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[SI-LIST] Re: Decoupling capacitors for BGA
- From: "Barry Caldwell" <barryc@xxxxxxxxxxx>
- To: <joel@xxxxxxxxxx>, <leeritchey@xxxxxxxxxxxxx>
- Date: Mon, 15 May 2006 10:36:30 -0600
Todd Hubbing had a good article in I think Printed circuit Design not to
long ago on this issue that is a very good place to start in working a
solution also.=20
Barry Caldwell
Sr. MTS=20
Vitesse Semiconductor
4323 Arrows West Drive
Colorado Springs, CO 80907
719 867 6327
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Joel Brown
Sent: Monday, May 15, 2006 10:14 AM
To: leeritchey@xxxxxxxxxxxxx
Cc: Dagmara Avanindra; subramanian1683@xxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Decoupling capacitors for BGA
=20
Lee,
We are dealing with this same issue of bypass caps for BGAs.
If we place the caps outside the shape of the BGA as you suggest, how
much inductance is added by the planes over a distance of say 0.5" if
the planes are spaced close together, say 5 mils.
Thanks - Joel
Lee Ritchey wrote: If you connect capacitors to pins with traces, the
added inductance will degrade theri performance enough that they will
likely be of little use. Better to place the capacitors outside the
shape of the BGA and connect them into the planes directly with vias.
No, they don't need to directly under the BGA as long as the planes are
continuous. [Original Message] From: Dagmara Avanindra
<dagmara.avanindra@xxxxxxxxx>[1] To:
<subramanian1683@xxxxxxxxx>[2] Cc: <si-list@xxxxxxxxxxxxx>[3] Date:
5/12/20068:46:23 PM Subject: [SI-LIST] Re: Decoupling capacitors for BGA
Subbu, if your board is not thick, you may want to consider using 0201
caps directly underneeth the BGA aray, especially if GND and VDD are
located directly diagonally across from each other. If you connect caps
via individual traces to the pins, you will get alot of resistivity.
Which can bea plus if your goal is to dampen high-frequency noise.
However, if you maketraces very thin and long, you may slow your
response time too. So calculate your resisitivity per square to figure
out what is the optimal cap connection for you. Dagmara On 5/12/06,
Subramanian R <subramanian1683@xxxxxxxxx>[4] wrote: Hello All, We are
using a 0.5mm Pitch 457-Pin BGA Processor. It is running at a maximum of
532MHz. It has 60 Power pins (Core &I/O) How do i place the Decoupling
capacitors? Now we have placedall decaps (0402 pack) around the BGA
(like an island) and connected itto the VCC plane. Should i need to
route it to the individual pins itself?
The BGA does not have much space between the Balls. So not more than 4-5
capscan be placed right over the BGA on the other side. The other thing
i cango for is Inter-plane capacitance. But for that VCC-GND dielectric
should be around 2-3mils, i understand. That doesn't look possible with
our PCB thickness requirements. It is a 6-layer PCB Thanks for any
suggestions.
Regards Subbu
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