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[SI-LIST] Re: PI Analysis about Core Power Supply
- From: "Tom Dagostino" <tom@xxxxxxxxxxxxx>
- To: <zhang_kun@xxxxxxxxxx>, "si-list" <si-list@xxxxxxxxxxxxx>
- Date: Sat, 7 May 2005 20:09:31 -0700
There were a couple of papers given at DesignCon earlier this year that
might be of interest.
Tom Dagostino
Teraspeed Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
http://www.teraspeed.com
tom@xxxxxxxxxxxxx
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827
Teraspeed is the registered service mark of
Teraspeed Consulting Group LLC
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Zhangkun
Sent: Saturday, May 07, 2005 7:49 PM
To: si-list
Subject: [SI-LIST] PI Analysis about Core Power Supply
Dear All
In current work, I am studying core power supply. The voltage of core power
is very low (0.9V-1.2V) and the power consuming is very high (dozens of
Amperes). There is often power integrity problem in the frequency domain
from 10MHz to 20MHz. The solution is very easy that discrete caps should be
added on the PCB.
My problem is that the PI problem is found out until the first edition has
been produced. Then the decoupling caps is determined. I want to determine
the decoupling caps before the first edition is produced in order to quicken
the design flow. Therefore, I should know the current noise source. I have
been looking for the paper about how to get the core power consuming in IEEE
electrical library. However, I have not found any useful paper.
I hope I have express myself clear. Any advice is prefered.
Best Regards
Zhangkun
2005.5.8
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