FreeLists / si-list / [SI-LIST] Re: Copper Thieving (was: "checkered" copper plane question)

["Paul Taddonio" <ptaddoni@xxxxxxxxxxxxxxxxxx>]

Fab houses would like to have thieving on blank spots in internal layers, in
this case it 
creates a uniform thickness across a board.  Does an array of disconnected
metal squares
on an internal layer hurt?  That has been debated on this email reflector
before.
I would not want that as it seems to create more paths for signals to couple
together.

High speed boards with a lot of layers (18+) should have stackups designed
with adequate reference
planes so there is no need to add any more solid fill areas. Some hi-speed
board stackup designs
employ two orthogonal routing layers sandwiched between two GND planes.
Adding GND fill in 
open areas of the routing layers would result in the wrong impedance under
these areas... 
and that would be bad.    -Paul

-----Original Message-----
From: Bill Mueller [mailto:williamm@xxxxxxx] 
Sent: Tuesday, May 13, 2003 4:37 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Copper Thieving (was: "checkered" copper plane question)



Hello again all,

It's nice to have a name to it.  Thanks for all the
great information.

My buddy and I here usually fill large open areas
with solid planes stapled to the nearest power/ground
plane.  Pretty much to add another reference to signals
on adjacent layers.

So two more questions come to mind:

    1. If we started making many-layered boards (8-10+),
        would these manufacturing considerations begin
        to out-weigh the electrical benifits?

    2. Is copper thieving used on internal layers?

Thanks again,
-Bill

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