Date Index for si-list, 05-2002

[si-list] || [05-2002 Date Index] [05-2002 Thread Index]

[SI-LIST] Re: Trace Bends - Doug McKean
[SI-LIST] Serpentine/Spiral Lines (was Re: Trace Bends) - Chris Padilla
[SI-LIST] Re: Serpentine/Spiral Lines (was Re: Trace Bends) - Alex McPheeters
[SI-LIST] Design rule on immunity not effective - Douglas C. Smith
[SI-LIST] Diff 2 Load - pikeda
[SI-LIST] Re: Serpentine/Spiral Lines (was Re: Trace Bends) - Neeraj Pendse
[SI-LIST] Re: Serpentine/Spiral Lines (was Re: Trace Bends) - Tsuk, Michael
[SI-LIST] Re: Diff 2 Load - Ivanov, Evghenii
[SI-LIST] Re: Serpentine/Spiral Lines (was Re: Trace Bends) - Loyer, Jeff W
[SI-LIST] signal integrity in circuit pack development process - Dennis Schmitz
[SI-LIST] S-parameter simulation in NSpice - Yu Liu
[SI-LIST] To the list administrator - David Instone
[SI-LIST] SJ/ Boston-Sr SI FAE's Needed...Ref fees paid! - Gary-Paul Congdon
[SI-LIST] Re: looking for (differential) crosstalk calculator on the web - prathap muthana
[SI-LIST] Limits of Wide Band Match to Reactive Impedances - Christian Schuster
[SI-LIST] looking for (differential) crosstalk calculator on the web - Doug Brooks
[SI-LIST] differential noise - rajat . chauhan
[SI-LIST] Re: looking for (differential) crosstalk calculator onthe web - Scott McMorrow
[SI-LIST] DDR DRAM - Ravinder Ajmani
[SI-LIST] Re: DDR DRAM - Bill Dempsey
[SI-LIST] Re: DDR DRAM - Ravinder Ajmani
[SI-LIST] Re: Voltage droop analysis_ load current model - Larry Smith
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Larry Smith
[SI-LIST] Re: DDR DRAM - Kevin Normoyle
[SI-LIST] Ccomp in HSPICE - Timothy Coyle
[SI-LIST] [Crosstalk calculation] - You Se Ho
[SI-LIST] Re: Voltage droop analysis_ load current model - Larry Smith
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Chris Cheng
[SI-LIST] Decoupling capacitors - Alexander.Shapira
[SI-LIST] Re: Voltage droop analysis_ load current model - Chris Cheng
[SI-LIST] Re: Ccomp in HSPICE - Luca Giacotto
[SI-LIST] Re: Ccomp in HSPICE - Jeremy Plunkett
[SI-LIST] Re: [Crosstalk calculation] - Ched-Chang Chai
[SI-LIST] Re: Decoupling capacitors - Michael_Greim
[SI-LIST] Re: Decoupling capacitors - Douglas C. Smith
[SI-LIST] Re: Decoupling capacitors - Istvan Novak - Board Design Technology
[SI-LIST] Re: Decoupling capacitors - Wayne Cooke
[SI-LIST] Re: Decoupling capacitors - Douglas C. Smith
[SI-LIST] Re: Decoupling capacitors - Jackson, T L
[SI-LIST] Re: Decoupling capacitors - Shawn Arnold
[SI-LIST] Re: [Crosstalk calculation] - Neeraj Pendse
[SI-LIST] 3D Field Solvers - Bill Dempsey
[SI-LIST] Re: 3D Field Solvers - Scott McMorrow
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Larry Smith
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Larry Smith
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Zhiping Yang
[SI-LIST] Stub Definition - Doug Brooks
[SI-LIST] Re: Stub Definition - Michael_Greim
[SI-LIST] Re: Stub Definition - Nitin Bhandari
[SI-LIST] Package Resonance - Neeraj Pendse
[SI-LIST] Re: Decoupling capacitors - Ivor Bowden
[SI-LIST] Re: Ccomp in HSPICE - Mirmak, Michael
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Jiayuan Fang
[SI-LIST] Re: DDR DRAM - john lipsius
[SI-LIST] DDR SDRAM - Ched-Chang Chai
[SI-LIST] Re: Package Resonance - Dan Swanson
[SI-LIST] Re: DDR SDRAM - Kurt Blacker
[SI-LIST] Re: Stub Definition - DAmbrosia, John F
[SI-LIST] Re: DDR SDRAM - D. C. Sessions
[SI-LIST] Re: Stub Definition - DAmbrosia, John F
[SI-LIST] Re: Ccomp in HSPICE - Todd Westerhoff
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Larry Smith
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Larry Smith
[SI-LIST] Anyone with DDR2 experience? - Patrick O'Shea
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Zhiping Yang
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Larry Smith
[SI-LIST] Board via characteristics (fwd) - David Hoover
[SI-LIST] Re: Board via characteristics (fwd) - steve weir
[SI-LIST] Re: Board via characteristics (fwd) - Aubrey_Sparkman
[SI-LIST] Re: Board via characteristics (fwd) - Clewell, Craig
[SI-LIST] Re: Board via characteristics (fwd) - Ray Anderson
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Michael_Greim
[SI-LIST] Re: Board via characteristics (fwd) - Chris Cheng
[SI-LIST] Re: Frequency criterion in power plane_Power integr ity - Chris Cheng
[SI-LIST] Re: Board via characteristics (fwd) - Jian X. Zheng
[SI-LIST] Limiting number of nodes in HSPICE .probe output files - Ingraham, Andrew
[SI-LIST] Re: Board via characteristics (fwd) - Ray Anderson
[SI-LIST] Re: Limiting number of nodes in HSPICE .probe output files - Bill . Cohen
[SI-LIST] Re: Limiting number of nodes in HSPICE .probe output files - Ingraham, Andrew
[SI-LIST] Re: Limiting number of nodes in HSPICE .probe output files - Peterson, George W
[SI-LIST] Re: Limiting number of nodes in HSPICE .probe output files - Bill . Cohen
[SI-LIST] Re: Anyone with DDR2 experience? - msharpes
[SI-LIST] Re: Limiting number of nodes in HSPICE .probe outputfiles - Ted Mido
[SI-LIST] Re: Frequency criterion in power plane_Power integr ity - Larry Smith
[SI-LIST] Eye diagrams in XTK on PC - Timothy Coyle
[SI-LIST] Edge Coupled Symmetrical Stripline Questions - Al Owens
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Larry Smith
[SI-LIST] Re: Eye diagrams in XTK on PC - Ron . J . Morneault
[SI-LIST] loosely vs tightly coupled differential pairs - David Kaiser
[SI-LIST] Re: Edge Coupled Symmetrical Stripline Questions - Sanchez, Louis
[SI-LIST] SI Engineer - Available - Sainath Nimmagadda
[SI-LIST] .NET Statements in HSPICE for S-Parameters - Chien-Min Lin
[SI-LIST] Re: .NET Statements in HSPICE for S-Parameters - Ross Jatou
[SI-LIST] Re: loosely vs tightly coupled differential pairs - Bill Dempsey
[SI-LIST] Re: Eye diagrams in XTK on PC - Brad Griffin
[SI-LIST] Re: Board via characteristics (fwd) - Raj Raghuram
[SI-LIST] Re: Limiting number of nodes in HSPICE .probe outp - Jay Shenoy
[SI-LIST] Re: .NET Statements in HSPICE for S-Parameters - Chien-Min Lin
[SI-LIST] Re: Limiting number of nodes in HSPICE .probe output files - Matthew Russell
[SI-LIST] Solder & Paste Mask Properties - Adeel Malik
[SI-LIST] Signal Integrity Seminar, May 21, 2002, Boxborough Massachusetts - Kathy Breda
[SI-LIST] Effect of Driving current - Ched-Chang Chai
[SI-LIST] Re: Effect of Driving current - Ingraham, Andrew
[SI-LIST] DDR SDRAM 857 CLOCK DRIVER - evillaf
[SI-LIST] Sr. SI opportunity - tal Sophia
[SI-LIST] Re: .NET Statements in HSPICE for S-Parameters - Yu Liu
[SI-LIST] Two layer board impedance calculation - Goutham . S
[SI-LIST] Re: Sr. SI opportunity - Rich Peyton
[SI-LIST] Differential noise - rajat . chauhan
[SI-LIST] Re: Solder & Paste Mask Properties - David Hoover
[SI-LIST] Re: Differential noise - Wayne Cooke
[SI-LIST] Re: Differential noise - steve weir
[SI-LIST] Re: Differential noise - rajat . chauhan
[SI-LIST] Re: Differential noise - Scott McMorrow
[SI-LIST] Re: Differential noise - steve weir
[SI-LIST] Re: Solder & Paste Mask Properties - Bill Dempsey
[SI-LIST] Re: Differential noise - Doug McKean
[SI-LIST] Re: Differential noise - Wayne Cooke
[SI-LIST] Re: Two layer board impedance calculation - Ravinder Ajmani
[SI-LIST] Announcement - Scott McMorrow
[SI-LIST] bit sequence generator for SPICE - Beal, Weston
[SI-LIST] Propagation velocity vs. temperature in PCB traces - Eric Goodill
[SI-LIST] Re: .NET Statements in HSPICE for S-Parameters - Chien-Min Lin
[SI-LIST] Re: Propagation velocity vs. temperature in PCB traces - Nirmal Sharma
[SI-LIST] Re: bit sequence generator for SPICE - CCT20ES
[SI-LIST] IBIS Model for a Tri_State Pin - Craciun, Liviu-Dumitru
[SI-LIST] Common Mode vs. Even Mode - Mirmak, Michael
[SI-LIST] Cap discontinuity - mittalr@xxxxxxxxxx
[SI-LIST] Re: Common Mode vs. Even Mode - Clewell, Craig
[SI-LIST] Re: Common Mode vs. Even Mode - Doug Brooks
[SI-LIST] Re: Cap discontinuity - Jian X. Zheng
[SI-LIST] Signal Integrity related papers on SiQual's website - Rob Hinz
[SI-LIST] Re: Common Mode vs. Even Mode - Loyer, Jeff W
[SI-LIST] Re: IBIS Model for a Tri_State Pin - Ingraham, Andrew
[SI-LIST] Re: Cap discontinuity - mittalr@xxxxxxxxxx
[SI-LIST] Re: Cap discontinuity - Jian X. Zheng
[SI-LIST] Re: Cap discontinuity - Ray Anderson
[SI-LIST] Re: Common Mode vs. Even Mode - Dean Gonzales
[SI-LIST] Re: Common Mode vs. Even Mode - Abdulrahman Rafiq
[SI-LIST] Re: Cap discontinuity - Ray Anderson
[SI-LIST] Re: Common Mode vs. Even Mode - X2Y
[SI-LIST] Re: Common Mode vs. Even Mode - Clewell, Craig
[SI-LIST] Re: Cap discontinuity - Hassan O. Ali
[SI-LIST] Re: Cap discontinuity - Daniel, Erik S., Ph.D.
[SI-LIST] Cross-talk, which one is bigger? - Zhenhua Fan
[SI-LIST] Re: Cap discontinuity - Loyer, Jeff W
[SI-LIST] Re: Common Mode vs. Even Mode - Loyer, Jeff W
[SI-LIST] Re: Decoupling capacitors - Ray Anderson
[SI-LIST] Re: Decoupling capacitors - Chris Cheng
[SI-LIST] Re: Decoupling capacitors - mkhusid
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Chris Cheng
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - Chris Cheng
[SI-LIST] Re: Cross-talk, which one is bigger? - Ched-Chang Chai
[SI-LIST] Re: Frequency criterion in power plane_Power integrity - gurunath vinayakrao kulkarni
[SI-LIST] a signal integrity problem - Juan Manuel
[SI-LIST] Labelling waveforms in XTK - Siva kumar
[SI-LIST] Re: Decoupling capacitors - Michael_Greim
[SI-LIST] FW: Re: Cap discontinuity - Loyer, Jeff W
[SI-LIST] Re: Decoupling capacitors - mittalr@xxxxxxxxxx
[SI-LIST] Re: Decoupling capacitors - pwelling
[SI-LIST] Re: Decoupling capacitors - Lieby David
[SI-LIST] Re: Decoupling capacitors - Chris Padilla
[SI-LIST] Jitter from Crosstalk - Ray Anderson
[SI-LIST] Re: Labelling waveforms in XTK - Chris Rokusek
[SI-LIST] Unable to unsubscribe!!!!!!!!!!!!!!! - Doug
[SI-LIST] Re: Jitter from Crosstalk - Volk, Andrew M
[SI-LIST] Re: FW: Re: Cap discontinuity - Jeremy Plunkett
[SI-LIST] Re: Unable to unsubscribe!!!!!!!!!!!!!!! - Ingraham, Andrew
[SI-LIST] s2ibis2 Problem - Abhijit Mahajan
[SI-LIST] Re: s2ibis2 Problem - Feldman, Richard
[SI-LIST] Wire impedance at HF - Tabatchnick, Justin
[SI-LIST] Re: Wire impedance at HF - Neeraj Pendse
[SI-LIST] Re: Wire impedance at HF - Rob Hinz
[SI-LIST] FW: Wire impedance at HF - Tabatchnick, Justin
[SI-LIST] FW: Wire impedance at HF - Tabatchnick, Justin
[SI-LIST] FW: FW: Wire impedance at HF - Tabatchnick, Justin
[SI-LIST] FW: FW: Wire impedance at HF - Tabatchnick, Justin
[SI-LIST] Re: Common Mode vs. Even Mode - You Se Ho
[SI-LIST] Resistivity of Tin/lead Plating - Adeel Malik
[SI-LIST] Re: Decoupling capacitors - Wayne Cooke
[SI-LIST] problems encountered extracting radiation losses - Jan Vercammen
[SI-LIST] Test - Charles Grasso
[SI-LIST] PCIX AND Tprop - Brahim Koudssi
[SI-LIST] Re: PCIX AND Tprop - Scott McMorrow
[SI-LIST] Re: PCIX AND Tprop - mittalr@xxxxxxxxxx
[SI-LIST] Re: problems encountered extracting radiation losses - Christian Schuster
[SI-LIST] Re: Decoupling capacitors - Doug Brooks
[SI-LIST] Re: Entry level RF book - Rob Hinz
[SI-LIST] Re: Pole/Zero Extraction from measured S-parameter - Teo Yatman
[SI-LIST] [Fwd: Entry level RF book] - Jochen Feldhaar
[SI-LIST] Info on Capacitive loading of devices - Sreejith Varma
[SI-LIST] Re: Info on Capacitive loading of devices - Ingraham, Andrew
[SI-LIST] Re: Resistivity of Tin/lead Plating - David Hoover
[SI-LIST] Re: Decoupling capacitors - Wayne Cooke
[SI-LIST] Re: Decoupling capacitors - Ray Anderson
[SI-LIST] Re: Decoupling capacitors - Ross Jatou
[SI-LIST] Re: Decoupling capacitors - Wayne Cooke
[SI-LIST] Re: Decoupling capacitors - Larry Smith
[SI-LIST] Re: Decoupling capacitors - Ray Anderson
[SI-LIST] Attaching coax cable to board - mittalr@xxxxxxxxxx
[SI-LIST] Re: Decoupling capacitors - Raj Raghuram
[SI-LIST] Re: Attaching coax cable to board - Michael Khusid
[SI-LIST] FWD: Signal Integrity Position - Hassan O. Ali
[SI-LIST] Re: FWD: Signal Integrity Position - Chris Cheng
[SI-LIST] Re: FWD: Signal Integrity Position - Alex McPheeters
[SI-LIST] Waveform Correlation - Abe Riazi
[SI-LIST] Re: Waveform Correlation - greg kimball
[SI-LIST] Re: Entry level RF book - Chien-Min Lin
[SI-LIST] Re: Waveform Correlation - Abe Riazi
[SI-LIST] Re: Decoupling capacitors - Ray Anderson
[SI-LIST] Re: Decoupling capacitors - Scott McMorrow
[SI-LIST] Re: Decoupling capacitors - Ray Anderson
[SI-LIST] Sweep voltage source for EMI study - =?big5?b?u6+kaLPHXChTLiBDLiBDaGFvXCk=?=
[SI-LIST] FPC Cable Modeling - Roger_Wu
[SI-LIST] [SI-LIST]: Design a shielded differential line - PRIEUR, Olivier
[SI-LIST] THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON EMC - NEW VENUE! NEW CALL FORPAPERS - Elya B. Joffe
[SI-LIST] Re: Decoupling capacitors - Ray Anderson
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - steve weir
[SI-LIST] Re: Decoupling capacitors - Ray Anderson
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - john lipsius
[SI-LIST] Re: Decoupling capacitors - mesh density - Raj Raghuram
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - Charles Grasso
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - Paul Levin
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - Dan Swanson
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - Ken Cantrell
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - Ingraham, Andrew
[SI-LIST] Re: [SI-LIST]: Design a shielded differential line - Ingraham, Andrew
[SI-LIST] PCI Timing Q? - Brahim Koudssi
[SI-LIST] Re: PCI Timing Q? - Ingraham, Andrew
[SI-LIST] Re: PCI Timing Q? - James_R_Jones
[SI-LIST] Re: PCI Timing Q? - Brahim Koudssi
[SI-LIST] Re: PCI Timing Q? - Ingraham, Andrew
[SI-LIST] Re: Decoupling capacitors - Heiko Dudek
[SI-LIST] Re: PCI Timing Q? - Peterson, George W
[SI-LIST] Re: Decoupling capacitors - Lynne Green
[SI-LIST] Re: Decoupling capacitors - mesh density - Ray Anderson
[SI-LIST] Using W-element in HSPICE - Bob Patel
[SI-LIST] Re: Using W-element in HSPICE - Michael_Greim
[SI-LIST] Re: Using W-element in HSPICE - Bob Patel
[SI-LIST] Re: Using W-element in HSPICE - Patrick_Carrier
[SI-LIST] Re: Using W-element in HSPICE - Bob Patel
[SI-LIST] Re: Using W-element in HSPICE - Patrick_Carrier
[SI-LIST] Re: Using W-element in HSPICE - john lipsius
[SI-LIST] PCI Timing Q? - Gregory R Edlund
[SI-LIST] Re: Using W-element in HSPICE - Clewell, Craig
[SI-LIST] PCI CLOCK AND DATA IN HSPICE - Brahim Koudssi
[SI-LIST] Re: Using W-element in HSPICE - Steve Corey
[SI-LIST] Errata Sheet for Wadell's "Transmission Line Design Handbook" - Ray Anderson
[SI-LIST] Re: Decoupling capacitors - mesh density - Chris Cheng
[SI-LIST] Re: Errata Sheet for Wadell's "Transmission Line Design Handbook" - Christian Schuster
[SI-LIST] Re: Errata Sheet for Wadell's "Transmission Line Design Handbook" - Ray Anderson
[SI-LIST] list server outage - Ray Anderson
[SI-LIST] Graduating student looking for position - zanella, fabrizio
[SI-LIST] Re: list server outage - Mike LaBonte