Date Index for si-list, 04-2007

[si-list] || [04-2007 Date Index] [04-2007 Thread Index]

[SI-LIST] Cross-hatched reference planes - Shawn Arnold
[SI-LIST] Re: Cross-hatched reference planes - Lee Ritchey
[SI-LIST] Optimal is Looking for SI Engineers - Dave Demaria
[SI-LIST] overshoot and undershoot different swing - rajeev.kommera
[SI-LIST] Re: Cross-hatched reference planes - Jeff Seeger
[SI-LIST] Re: overshoot and undershoot different swing - Jim (James) Antonellis
[SI-LIST] Re: overshoot and undershoot different swing - Tom Dagostino
[SI-LIST] Re: Cross-hatched reference planes - Lee Ritchey
[SI-LIST] Re: Cross-hatched reference planes - Jeff Seeger
[SI-LIST] Re: Cross-hatched reference planes - Lee Ritchey
[SI-LIST] Re: Cross-hatched reference planes - Richard P EVANS
[SI-LIST] Re: overshoot and undershoot different swing - Jim Whitehead
[SI-LIST] Re: overshoot and undershoot different swing - Alan Hilton-Nickel
[SI-LIST] Re: Cross-hatched reference planes - MW-hot-ip
[SI-LIST] Extracting waveguide s-parameter on anisotropic material - 蒙玉宝
[SI-LIST] Re: overshoot and undershoot different swing - Andrew Ingraham
[SI-LIST] R: Extracting waveguide s-parameter on anisotropic material - gianguida
[SI-LIST] SSO doubt - Canes Venatici
[SI-LIST] Bogatin presentations now posted at BeTheSignal.com - Eric Bogatin
[SI-LIST] Re: Cross-hatched reference planes - Jeff Seeger
[SI-LIST] Re: Cross-hatched reference planes - Lee Ritchey
[SI-LIST] Re: Cross-hatched reference planes - Andrew Ingraham
[SI-LIST] Re: Cross-Hatched Reference Planes - Mitch S. Morey
[SI-LIST] Re: Cross-hatched reference planes - Julian Ferry
[SI-LIST] Re: SSO doubt - Jory McKinley
[SI-LIST] Re: Cross-Hatched Reference Planes - Scott McMorrow
[SI-LIST] Re: Cross-hatched reference planes - Jeff Seeger
[SI-LIST] IBIS Workshop - Lynne D. Green
[SI-LIST] Re: Cross-hatched reference planes - Chris Cheng
[SI-LIST] Re: Cross-hatched reference planes - Ray Anderson
[SI-LIST] Re: Cross-hatched reference planes - Chris Cheng
[SI-LIST] Basic doubt - SRINIVASAN ANAND-B06739
[SI-LIST] Re: Basic doubt - abhishek@xxxxxxxxx
[SI-LIST] Re: Cross-hatched reference planes - Richard P EVANS
[SI-LIST] Job opening for SI Engr. - Tina Lipert
[SI-LIST] Cisco Systems, RTP, NC, SI Intern Position - Doug White \(dowhite\)
[SI-LIST] Re: Cross-hatched reference planes - Lee Ritchey
[SI-LIST] Re: Cross-hatched reference planes - Christopher.Jakubiec
[SI-LIST] Re: Basic doubt - bcasiano
[SI-LIST] Re: Cross-hatched reference planes - Ed Linke
[SI-LIST] Re: Basic doubt - Lee Ritchey
[SI-LIST] Re: Cross-hatched reference planes - Lee Ritchey
[SI-LIST] Re: Cross-hatched reference planes - Lee Ritchey
[SI-LIST] Cisco Systems, RTP, NC, SI Intern Position - Doug White \(dowhite\)
[SI-LIST] European IBIS Summit @ DATe 2007 - Fourth Call for Participation - Ralf Bruening
[SI-LIST] Rubber Band Theory of Circuit Design - Doug Smith
[SI-LIST] Re: Extracting waveguide s-parameter on anisotropic material - ronald miller
[SI-LIST] Re: impedance and Characteristic impedanece - Muranyi, Arpad
[SI-LIST] Re: impedance and Characteristic impedanece - David Banas
[SI-LIST] Re: impedance and Characteristic impedanece - Muranyi, Arpad
[SI-LIST] Re: Extracting waveguide s-parameter on anisotropic material - bratfest
[SI-LIST] Re: impedance and Characteristic impedanece - Zhenggang Cheng
[SI-LIST] Re: impedance and Characteristic impedanece - Muranyi, Arpad
[SI-LIST] Cadence Designer Network - CDNLive! SV 2007 Call for Papers - Michael Catrambone
[SI-LIST] Re: impedance and Characteristic impedanece - Kotson, Michael
[SI-LIST] NPU / DDR interface bug issue - BOUTHEMY JEAN PIERRE
[SI-LIST] Re: NPU / DDR interface bug issue - Chris Johnson
[SI-LIST] Re: NPU / DDR interface bug issue - Kotson, Michael
[SI-LIST] Re: impedance and Characteristic impedanece - Sam Sam
[SI-LIST] Re: impedance and Characteristic impedanece - Chris Padilla \(cpad\)
[SI-LIST] Re: NPU / DDR interface bug issue - BOUTHEMY JEAN PIERRE
[SI-LIST] Re: impedance and Characteristic impedanece - Muranyi, Arpad
[SI-LIST] Re: NPU / DDR interface bug issue - Christopher R. Johnson
[SI-LIST] Hspice to matlab - Sam Sam
[SI-LIST] Probe card - Paul Park
[SI-LIST] Re: Hspice to matlab - Clewell, Craig
[SI-LIST] Re: Hspice to matlab - Sam Sam
[SI-LIST] Re: impedance and Characteristic impedanece - Kevin Ko
[SI-LIST] ADC Gnd Noise - deepak kamath
[SI-LIST] ADC Gnd Noise - deepak kamath
[SI-LIST] Re: ADC Gnd Noise - PRAJIT S NAIR
[SI-LIST] Re: impedance and Characteristic impedanece - agathon
[SI-LIST] Re: impedance and Characteristic impedanece - agathon
[SI-LIST] Re: ADC Gnd Noise - Gupta, Deepali
[SI-LIST] Re: ADC Gnd Noise - azim saiyed
[SI-LIST] Re: impedance and Characteristic impedanece - Kevin Ko
[SI-LIST] experiences with new field solvers / methods? - agathon
[SI-LIST] Re: impedance and Characteristic impedanece - agathon
[SI-LIST] Re: experiences with new field solvers / methods? - agathon
[SI-LIST] Re: ADC Gnd Noise - deepak kamath
[SI-LIST] Re: ADC Gnd Noise - istvan novak
[SI-LIST] Re: ADC Gnd Noise - Peterson, James F \(EHCOE\)
[SI-LIST] Re: ADC Gnd Noise - Dave Instone
[SI-LIST] Re: ADC Gnd Noise - KEGAN
[SI-LIST] Re: ADC Gnd Noise - art_porter
[SI-LIST] Re: ADC Gnd Noise - Chris Padilla \(cpad\)
[SI-LIST] Re: ADC Gnd Noise - Peterson, James F \(EHCOE\)
[SI-LIST] Re: Hspice to matlab - Andrew Ingraham
[SI-LIST] Re: Hspice to matlab - vivek anand
[SI-LIST] Re: ADC Gnd Noise - Jon Keeble
[SI-LIST] Re: ADC Gnd Noise - Jon Keeble
[SI-LIST] Re: ADC Gnd Noise - Alan Hilton-Nickel
[SI-LIST] ADC GND Noise - deepak kamath
[SI-LIST] ADC GND Noise - deepak kamath
[SI-LIST] ADC GND Noise - deepak kamath
[SI-LIST] Re: ADC GND Noise - PRAJIT S NAIR
[SI-LIST] European IBIS Summit at DATe 2007 - Agenda & Call for Paticipation - Ralf Bruening
[SI-LIST] SSO doubt - Canes Venatici
[SI-LIST] High Temp PCB Material - Christopher.Jakubiec
[SI-LIST] Re: impedance and Characteristic impedanece - Boris Traa
[SI-LIST] Re: High Temp PCB Material - Srikanth
[SI-LIST] Books for sale. - craig-sullivan
[SI-LIST] Re: High Temp PCB Material - HaroldLSJ
[SI-LIST] Re: SSO doubt - Sinha, Snehamay
[SI-LIST] songful unkind - Kerriq Monroec
[SI-LIST] Re: Good book about jitter.... - Siddesh V
[SI-LIST] FW: Re: Good book about jitter.... - Lynne D. Green
[SI-LIST] Re: High Temp PCB Material - Hal Murray
[SI-LIST] Re: Good book about jitter.... - istvan novak
[SI-LIST] Re: High Temp PCB Material - Donald Sionne
[SI-LIST] SMPTE RP-184 - Jim (James) Antonellis
[SI-LIST] Re: Good book about jitter.... - npatel
[SI-LIST] Bi-Directional interfaces at speeds higher than 5Gb/s - Moreira, Jose
[SI-LIST] Re: Good book about jitter.... - Jack Olson
[SI-LIST] Re: FW: Re: Good book about jitter.... - Chris Padilla \(cpad\)
[SI-LIST] Class in Austin, Texas - Lee Ritchey
[SI-LIST] Re: Good book about jitter.... - Chris Cheng
[SI-LIST] Sr. SI Engineering opportunity with Cisco - Thanh Duong -X \(thanhdu - Spherion at Cisco\)
[SI-LIST] Re: New Book - Lee Ritchey
[SI-LIST] Re: Good book about jitter.... - npatel
[SI-LIST] Regarding differential termination - vani.chandrasekharan
[SI-LIST] Re: Regarding differential termination - PRAJIT S NAIR
[SI-LIST] Re: Regarding differential termination - Dennis Han
[SI-LIST] RF / Microwave Design Engineer Position at Freescale Semiconductor, Tempe Arizona - Aaen Peter-r40889
[SI-LIST] Disadvantage of NEC2 - Kim Jeong Su
[SI-LIST] Re: Disadvantage of NEC2 - Andrew Ingraham
[SI-LIST] Re: Regarding differential termination - Salkow, Steven
[SI-LIST] Bus contention between FPGA and ZBT - Nathalie Charpiot
[SI-LIST] LVDS termination method - Supratim Basu
[SI-LIST] Re: LVDS termination method - Siva
[SI-LIST] Re: LVDS termination method - Siva
[SI-LIST] Low Cost PCB Layout Software - Christopher.Jakubiec
[SI-LIST] Re: Low Cost PCB Layout Software - Muranyi, Arpad
[SI-LIST] Re: Low Cost PCB Layout Software - Ray Anderson
[SI-LIST] Re: Low Cost PCB Layout Software - Chris Johnson
[SI-LIST] Re: Low Cost PCB Layout Software - Stuart Brorson
[SI-LIST] Re: Low Cost PCB Layout Software - Ray Anderson
[SI-LIST] Re: Low Cost PCB Layout Software - Mark Randol
[SI-LIST] Re: Low Cost PCB Layout Software - Mike Wilson
[SI-LIST] Re: LVDS termination method - Srivats Partha
[SI-LIST] +++ SI Expert Needed +++ - Greg Harmandayan
[SI-LIST] +++ SI Expert Needed +++ - Greg Harmandayan
[SI-LIST] Disadvantages of wider traces - Babid A
[SI-LIST] Re: Disadvantages of wider traces - istvan novak
[SI-LIST] Re: Disadvantages of wider traces - Partha Simon
[SI-LIST] Re: Bus contention between FPGA and ZBT - Andrew Ingraham
[SI-LIST] Re: Low Cost PCB Layout Software - Jack Olson
[SI-LIST] Re: High Temp PCB Material - Andrew Ingraham
[SI-LIST] Re: Bus contention between FPGA and ZBT - Scott McMorrow
[SI-LIST] Re: High Temp PCB Material - Christopher.Jakubiec
[SI-LIST] Re: Bus contention between FPGA and ZBT - Hargin, Bill
[SI-LIST] Re: Low Cost PCB Layout Software - Mark Randol
[SI-LIST] Error running s2ibis3 software - Jayasree Nayar
[SI-LIST] Re: Low Cost PCB Layout Software - Abe (Abbas) Riazi
[SI-LIST] Re: Low Cost PCB Layout Software - Stuart Brorson
[SI-LIST] Re: Low Cost PCB Layout Software - Abe (Abbas) Riazi
[SI-LIST] Re: Disadvantages of wider traces - Leonard Dieguez
[SI-LIST] DDR2 Pulse width - PG Pramod Kumar
[SI-LIST] Re: Low Cost PCB Layout Software - Ooi, Ching Leong
[SI-LIST] Re: Low Cost PCB Layout Software - Yuriy Shlepnev
[SI-LIST] Re: Disadvantages of wider traces - istvan novak
[SI-LIST] Re: Disadvantages of wider traces - Loyer, Jeff
[SI-LIST] Re: Disadvantages of wider traces - Leonard Dieguez
[SI-LIST] ROHS - Leonard Dieguez
[SI-LIST] Re: Disadvantages of wider traces - Loyer, Jeff
[SI-LIST] Re: ROHS - Conrad M Herse
[SI-LIST] Re: Disadvantages of wider traces - Partha Simon
[SI-LIST] Re: Disadvantages of wider traces - Leonard Dieguez
[SI-LIST] Re: Disadvantages of wider traces - Istvan Novak
[SI-LIST] Re: Disadvantages of wider traces - Barnes, Heidi
[SI-LIST] Re: ROHS - Mitch S. Morey
[SI-LIST] Re: Disadvantages of wider traces - Muranyi, Arpad
[SI-LIST] Re: Bus contention between FPGA and ZBT - Lynne D. Green
[SI-LIST] Re: ROHS - Jeff Seeger
[SI-LIST] Austin Area Job Opening - Michael Smocer
[SI-LIST] usb2.0 eye template - santhosh.etavalath
[SI-LIST] Re: usb2.0 eye template - PRAJIT S NAIR
[SI-LIST] IBISCHK4 parser updated; IBIS 4.2 now an ANSI specification - Mirmak, Michael
[SI-LIST] Re: ROHS - Howard Johnson
[SI-LIST] Recent ibischk4 Version 4.2.1 Improvements - Bob Ross
[SI-LIST] Re: My endpoint - Romeof Bradly
[SI-LIST] BGA Vs QFP - Canes Venatici
[SI-LIST] CISCO SYSTEMS - Paradiso, Cathi
[SI-LIST] Re: ROHS - Joel Brown
[SI-LIST] IBIS model for PCI Express Gen 2 - Mohammad Haeri Kermani
[SI-LIST] Re: IBIS model for PCI Express Gen 2 - Dan Bostan
[SI-LIST] TDR Analsis Equipment..Tektronix vs Agilent? - tom_cip_11551
[SI-LIST] Re: IBIS model for PCI Express Gen 2 - Mohammad Haeri Kermani
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Nash, Timothy J
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Barnes, Heidi
[SI-LIST] Re: BGA Vs QFP - Bush, Walter
[SI-LIST] Recall: BGA Vs QFP - Bush, Walter
[SI-LIST] usb2.0 eye template - santhosh.etavalath
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Asbenson, Lyndell L
[SI-LIST] Stimulus dilemma for pwr/gnd model - agathon
[SI-LIST] Re: BGA Vs QFP - Bush, Walter
[SI-LIST] Memory bus datapattern - Peter Johansson
[SI-LIST] Re: Memory bus datapattern - npatel
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Peter J
[SI-LIST] Two Layer Substrate packaging - sunil bharadwaz
[SI-LIST] Re: Memory bus datapattern - David Banas
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Cavanna, Vicente Vaca (Sr. ; ProCurve ASICs)
[SI-LIST] Transmission Line Causality - Sam Sam
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Tom Dagostino
[SI-LIST] Transmission Line Causality - Dmitriev-Zdorov, Vladimir
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Cavanna, Vicente Vaca (Sr. ; ProCurve ASICs)
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - dmitry.a.smolyansky
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Tom Dagostino
[SI-LIST] Two Layer routing - sunil bharadwaz
[SI-LIST] Re: Transmission Line Causality - Gary Otonari
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Cavanna, Vicente Vaca (Sr. ; ProCurve ASICs)
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - dmitry.a.smolyansky
[SI-LIST] Re: Two Layer routing - Ram Chundru
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Cavanna, Vicente Vaca (Sr. ; ProCurve ASICs)
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Cavanna, Vicente Vaca (Sr. ; ProCurve ASICs)
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - dmitry.a.smolyansky
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Loyer, Jeff
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Tom Dagostino
[SI-LIST] Re: Transmission Line Causality - bratfest
[SI-LIST] Re: Two Layer routing - Pommerenke, David
[SI-LIST] Re: Transmission Line Causality - steven.d.corey
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Dave Instone
[SI-LIST] building models from TDR measurements - Eric Bogatin
[SI-LIST] Drivers ? - Prasanna V
[SI-LIST] Backplane speed - Kihong Kim
[SI-LIST] Re: Drivers ? - Tom Dagostino
[SI-LIST] Re: Backplane speed - Tom Biggs
[SI-LIST] Re: TDR Analysis Equipment..Tektronix vs. Agilent? - mike_resso
[SI-LIST] Re: TDR Analysis Equipment..Tektronix vs. Agilent? - Aubrey_Sparkman
[SI-LIST] Re: TDR Analysis Equipment..Tektronix vs. Agilent? - Aubrey_Sparkman
[SI-LIST] Cisco Systems Internship Opportunity - Doug White \(dowhite\)
[SI-LIST] Re: Drivers ? - Kai Keskinen
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Alfred P. Neves
[SI-LIST] Re: Backplane speed - Kihong Kim
[SI-LIST] Spice recommendation - Robert Sefton
[SI-LIST] Re: Spice recommendation - David Banas
[SI-LIST] Re: Spice recommendation - Joel Brown
[SI-LIST] Re: Spice recommendation - steve weir
[SI-LIST] Re: Spice recommendation - Lynne D. Green
[SI-LIST] Re: Spice recommendation - Ron Kinder
[SI-LIST] Re: TDR Analsis Equipment..Tektronix vs Agilent? - Cavanna, Vicente Vaca (Sr. ; ProCurve ASICs)
[SI-LIST] User interfaces - Tom Biggs
[SI-LIST] Non-Functional Pads - Chris Herrick
[SI-LIST] Re: Non-Functional Pads - Nash, Timothy J
[SI-LIST] Re: TDR Analysis Equipment..Tektronix vs. Agilent? - steven.d.corey
[SI-LIST] Re: Drivers ? - Andrew Ingraham
[SI-LIST] Re: Drivers ? - Mirmak, Michael
[SI-LIST] Re: Spice recommendation - Robert Sefton
[SI-LIST] SSO SSTL Vs LVTTL - Canes Venatici
[SI-LIST] Re: Non-Functional Pads - Ralph A Wilson III
[SI-LIST] Re: SSO SSTL Vs LVTTL - Peterson, James F \(EHCOE\)
[SI-LIST] Re: SSO SSTL Vs LVTTL - Canes Venatici
[SI-LIST] Re: Non-Functional Pads - CARL RYU