FreeLists / si-list / [SI-LIST] Re: Paralleling driver outputs - is this still done?

["Aaron Shepard" <aarons@xxxxxxx>]

Charles,

I have paralleled drivers as a band-aid to improve marginal clock signals.
It's noteworthy that the drivers I used had a built in series resistance
(around 25 Ohms).  Concerns about driver-to-driver skew causing stress to
the device were alleviated by the presence of this series resistance.
The band-aid has been running for several years without any catastrophic
failures or noticable tolerance shifts.

Aaron Shepard


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Grasso, Charles
Sent: Thursday, April 01, 2004 12:38 PM
To: 'si-list@xxxxxxxxxxxxx'
Subject: [SI-LIST] Paralleling driver outputs - is this still done?


Greetings:


I have a design that will (I believe) need to used a buffer for the clock.
The intent is to drive multiple loads from the driver. One concern is the
variable gate delays and the solution is to parallel the inputs and the
outputs.



Is this technique still used ? Does anyone have a feel for the long term
reliability of the device driven is such a  way. The concern is that there
will be (for really short periods) a short between VCc and Gnd.



Thanks..



Best Regards
Charles Grasso
Senior Compliance Engineer
Echostar Communications Corp.
Tel:  303-706-5467
Fax: 303-799-6222
Cell: 303-204-2974
Email: charles.grasso@xxxxxxxxxxxx; <mailto:charles.grasso@xxxxxxxxxxxx;
%20>
Email Alternate: chasgrasso@xxxxxxxx <mailto:chasgrasso@xxxxxxxx>







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