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[SI-LIST] Re: PCB via simulations
- From: Dan Swanson <DSWANSON@xxxxxxxxxxxxx>
- To: "'beneken@xxxxxxxxxxxx'" <beneken@xxxxxxxxxxxx>,si-list@xxxxxxxxxxxxx
- Date: Mon, 1 Apr 2002 07:43:54 -0500
It looks like the boundaries of the
simulation space are perfectly conducting
walls. They might also be some kind of
low impedance absorbing boundaries.
In either case, there is no path for return
current in this model, other than the walls
of the simulator. This is a common mistake
is em simulation of multilayer transitions.
The results will be overly optimistic. In a real
board, the return path will typically be some
random combination of ground vias near this
signal via.
Dan
Dan Swanson EMAIL: d.swanson@xxxxxxxx
Forem USA PHONE: 978-834-4085
37 South Hunt Road FAX: 978-388-7077
Amesbury, MA 01913
-----Original Message-----
From: Thomas Beneken [mailto:beneken@xxxxxxxxxxxx]
Sent: Monday, April 01, 2002 7:10 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] PCB via simulations
Hi All,
I ran across PCB via simulations by Kevin Thomas of Cray Inc., September
1997. Updated March 2001.
http://lc.cray.com/apps/xvia/
hope it's useful for someone, (lost that thread ...)
Thomas
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