Go to the FreeLists Home Page Home Signup Help Login
 



Date Index for si-list, 04-2002

[si-list] || [04-2002 Date Index] [04-2002 Thread Index]

[SI-LIST] PCB via simulations - Thomas Beneken
[SI-LIST] Re: PCB via simulations - Dan Swanson
[SI-LIST] AW: Re: PCB via simulations - Thomas Beneken
[SI-LIST] Re: Importance of Package Height - Istvan Novak
[SI-LIST] Re: PCB via simulations - Dan Swanson
[SI-LIST] AW: Re: PCB via simulations - Thomas Beneken
[SI-LIST] Delay between signal and trigger - Khalid Ansari
[SI-LIST] Off Track system question - Doug Brooks
[SI-LIST] Re: Off Track system question - Loyer, Jeff W
[SI-LIST] Re: Off Track system question - Stephen Wu
[SI-LIST] Re: Off Track system question - Doug McKean
[SI-LIST] Re: Off Track system question - Mike Kersenbrock
[SI-LIST] Re: Off Track system question - Mike Kersenbrock
[SI-LIST] Re: Off Track system question - Drew
[SI-LIST] Re: Off Track system question - Drew
[SI-LIST] -ve Setup Time and Hold time. - s.j
[SI-LIST] AW: S-parameter to SPICE - Thomas Beneken
[SI-LIST] Re: AW: Re: PCB via simulations - Gary Haussmann
[SI-LIST] Interactive IFS-PRO - pwelling
[SI-LIST] SpeccraQuest ESPICE Resistor pack delay - Keskinen, Kai
[SI-LIST] Printed wiring board to chassis coupling - Douglas C. Smith
[SI-LIST] Re: Importance of Package Height - Abe Riazi
[SI-LIST] rGMII simulation model - Bram Dobbelaar
[SI-LIST] PCI V2.2 output drive and slew rate question - Fritz, Karl E.
[SI-LIST] Re: rGMII simulation model - Ghazzali Majeed
[SI-LIST] Re: backplane connector - Bergey, Dana
[SI-LIST] Re: ConceptHDL -> BLAST (EDIF) - Chuck Reynolds
[SI-LIST] Re: rGMII simulation model - Bram Dobbelaar
[SI-LIST] High Data Rate Cables - Giovanni Galiero
[SI-LIST] Re: High Data Rate Cables - James_R_Jones
[SI-LIST] Re: Need for SI Service Bureaus? - Barry Katz
[SI-LIST] Re: Need for SI Service Bureaus? - Bill Hargin
[SI-LIST] Connector simulation model - Siva kumar
[SI-LIST] Crosstalk on coupled striplines - Ched-Chang Chai
[SI-LIST] Re: Connector simulation model - Nash, Tim J (FL51)
[SI-LIST] SV: Connector simulation model - Anders Ekholm (ERA)
[SI-LIST] Re: Connector simulation model - Nash, Tim J (FL51)
[SI-LIST] Re: Connector simulation model - Julian Ferry
[SI-LIST] Allegro ? - Kipnis, Oleg
[SI-LIST] Re: Allegro ? - Michael Khusid
[SI-LIST] Re: Allegro ? - Zabinski, Patrick J.
[SI-LIST] Re: Allegro ? - Jeff Seeger
[SI-LIST] Re: Allegro ? - Michael_Greim
[SI-LIST] Signal Integrity/High speed design course in India - Joe Young
[SI-LIST] Signal Integrity/High speed design course in India - Joe Young
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Gregory R Edlund
[SI-LIST] Re: Signal Integrity/High speed design course in India - Jim Hanson
[SI-LIST] High Data Rate Cables (II) - Giovanni Galiero
[SI-LIST] Spice models encryption - Rotem Gazit
[SI-LIST] Re: Spice models encryption - Clewell, Craig
[SI-LIST] Why does lamination fail to prevent eddy currents at high frequencies? - Steve Rogers
[SI-LIST] Re: Allegro ? - Bill Dempsey
[SI-LIST] Re: Signal Integrity/High speed design course in India - Gary Otonari
[SI-LIST] Re: Need for SI Service Bureaus? - Barry Katz
[SI-LIST] HSPICE TR0 error - Peter LaFlamme
[SI-LIST] Re: HSPICE TR0 error - Tracy Barclay
[SI-LIST] Re: Need for SI Service Bureaus? - Mike LaBonte
[SI-LIST] Impedance of microstrip with/without GND plane - Bob Patel
[SI-LIST] Minimum Tracelength - Joe Young
[SI-LIST] Re: Minimum Tracelength - steve weir
[SI-LIST] what is the conductivity of a dielectric? - Patrick_Carrier
[SI-LIST] Re: what is the conductivity of a dielectric? - Greg Beck
[SI-LIST] Re: what is the conductivity of a dielectric? - Patrick_Carrier
[SI-LIST] Re: what is the conductivity of a dielectric? - Rob Hinz
[SI-LIST] Max operating temps. - Rich Peyton
[SI-LIST] Re: Max operating temps. - Bob Patel
[SI-LIST] PCI Buffer Slew Rate - Gil Gafni
[SI-LIST] Open Source Waveform Viewer for HSPICE - Kim Helliwell
[SI-LIST] Re: Open Source Waveform Viewer for HSPICE - raymonda
[SI-LIST] 0201 Components - pwelling
[SI-LIST] SSO pushout - Lin Wee
[SI-LIST] Re: SSO pushout - Abhijit Mahajan
[SI-LIST] Re: SSO pushout - Ed Priest
[SI-LIST] Re: SSO pushout - Muhammad Sagarwala
[SI-LIST] Re: what is the conductivity of a dielectric? - RayCaliendo
[SI-LIST] Re: what is the conductivity of a dielectric? - Knighten, Jim L
[SI-LIST] Re: SSO pushout - adeel . ahmad
[SI-LIST] Description of Gerber Format Files - Adeel Malik
[SI-LIST] AW: Description of Gerber Format Files - Thomas Beneken
[SI-LIST] WG: Description of Gerber Format Files - Thomas Beneken
[SI-LIST] Re: SSO pushout - Himanshu Arora
[SI-LIST] PCI Buffer Slew Rate - Gregory R Edlund
[SI-LIST] Re: SSO pushout - Ingraham, Andrew
[SI-LIST] Re: WG: Description of Gerber Format Files - Drew
[SI-LIST] Re: SSO pushout - Abhijit Mahajan
[SI-LIST] Re: SSO pushout - Haller, Robert
[SI-LIST] Re: SSO pushout, ground bounce, IO and core switching - Raymond Y. Chen
[SI-LIST] hi - sjs
[SI-LIST] Source-Synchronous Interface - Shankar . Raj
[SI-LIST] Re: ConceptHDL -> BLAST (EDIF) - Jinto N.Jose
[SI-LIST] Re: what is the conductivity of a dielectric? - Rob Hinz
[SI-LIST] Gil Gafne are you out there? - Alex McPheeters
[SI-LIST] Re: Source-Synchronous Interface - Ingraham, Andrew
[SI-LIST] Long simulation diverges - Hassan O. Ali
[SI-LIST] Re: Terminating a branched clock line - Bill Hargin
[SI-LIST] Re: Terminating a branched clock line - Moran, Brian P
[SI-LIST] Re: Terminating a branched clock line - Ken Patterson
[SI-LIST] Re: Terminating a branched clock line - Ravinder Ajmani
[SI-LIST] Re: SSO pushout, ground bounce, IO and core switching - Keven Hui
[SI-LIST] Re: what is the conductivity of a dielectric? - Sainath Nimmagadda
[SI-LIST] Re: what is the conductivity of a dielectric? - Rob Hinz
[SI-LIST] Re: what is the conductivity of a dielectric? - Sainath Nimmagadda
[SI-LIST] Re: what is the conductivity of a dielectric? - Sainath Nimmagadda
[SI-LIST] Re: Long simulation diverges - Steve Corey
[SI-LIST] Re: Terminating a branched clock line - Wen Fred-Q16099
[SI-LIST] HSPICE IBIS simulation of MPC948 clock driver has non-monotonic waveform: help please - Fred U. Rosenberger
[SI-LIST] ROUTING OF A SECOND PCI DEVICE ON AN EXPANSION SLOT - Suchitha . V
[SI-LIST] Re: SSO pushout, ground bounce definition - Raymond Y. Chen
[SI-LIST] Impedance calcuation - Joe Young
[SI-LIST] Re: Impedance calcuation - James_R_Jones
[SI-LIST] Re: Terminating a branched clock line - Doug Brooks
[SI-LIST] SV: Impedance calcuation - Anders Ekholm (ERA)
[SI-LIST] Re: SSO pushout, ground bounce definition - Ege Engin
[SI-LIST] does changing the edge of board profile help - Raseel Mohamed
[SI-LIST] Re: SSO pushout, ground bounce definition - Larry Smith
[SI-LIST] Re: SSO pushout, ground bounce definition - Larry Smith
[SI-LIST] Re: SSO pushout, ground bounce definition - Pat Diao
[SI-LIST] test - Drew
[SI-LIST] Test message - DELETE - Ray Anderson
[SI-LIST] Test - Delete before reading.... - Ray Anderson
[SI-LIST] Re: SSO pushout, ground bounce definition - Powers, Scott D.
[SI-LIST] Re: SSO pushout, ground bounce definition - joan vicent castell
[SI-LIST] Run Scheduled Drivers IBIS models on HSPICE 2001.4 - Chan, Michael
[SI-LIST] Re: SSO pushout, ground bounce definition - Larry Smith
[SI-LIST] Re: Measuring propagation delay on PWB interconnects - Loyer, Jeff W
[SI-LIST] Re: Run Scheduled Drivers IBIS models on HSPICE 2001.4 - Tracy Barclay
[SI-LIST] Re: Measuring propagation delay on PWB interconnects - Ritchey Lee
[SI-LIST] Re: SSO pushout, ground bounce definition - Pat Diao
[SI-LIST] Re: Run Scheduled Drivers IBIS models on HSPICE 2001.4 - Linnenbruegger Dirk
[SI-LIST] PCI question - SEOW,ERWIN-SP (HP-Singapore,ex6)
[SI-LIST] Re: PCI question - Matthias Mansfeld
[SI-LIST] Series Termination Question - Bill Reams
[SI-LIST] Re: Series Termination Question - Zabinski, Patrick J.
[SI-LIST] Package options/measurements for substrate noise reduction - Yehuda Yizraeli
[SI-LIST] Re: Series Termination Question - Aubrey_Sparkman
[SI-LIST] FW: Re: Series Termination Question - Mike Cantwell
[SI-LIST] PCB FABRICATION DETAILS - Adeel Malik
[SI-LIST] Re: Series Termination Question - Doug Brooks
[SI-LIST] This is a test msg. - jin shi
[SI-LIST] Looking for someone - fullname
[SI-LIST] AW: Re: Run Scheduled Drivers IBIS models on HSPICE 2001.4 - Linnenbruegger Dirk
[SI-LIST] Measuring propagation delay on PWB interconnects - Eric Bogatin
[SI-LIST] Re: Package options/measurements for substrate noise reduction - Tom Zimmerman
[SI-LIST] Re: SSO pushout, ground bounce definition - Larry Smith
[SI-LIST] Re: SSO pushout, ground bounce definition - Kai, Francis
[SI-LIST] Power and ground noise measurement. - Moore Mo (modaochun)
[SI-LIST] Re: Power and ground noise measurement. - Douglas C. Smith
[SI-LIST] gnd planes connection - Stefano Riccardi
[SI-LIST] Re: gnd planes connection - Yan Zhao
[SI-LIST] Re: Power and ground noise measurement. - Bill Hargin
[SI-LIST] test message. - jin shi
[SI-LIST] Test for my subscription - jin shi
[SI-LIST] Driving current - Ched-Chang Chai
[SI-LIST] Re: Driving current - Yehuda Yizraeli
[SI-LIST] Re: Driving current - Ingraham, Andrew
[SI-LIST] Driving current - rajat . chauhan
[SI-LIST] Re: Driving current - Bill . Cohen
[SI-LIST] SI software in use or to recommend - Greg Beck
[SI-LIST] [Asymptotic Waveform Evaluation (AWE)] - You Se Ho
[SI-LIST] Re: SSO pushout, ground bounce definition - Kai, Francis
[SI-LIST] Looking for someone - fullname
[SI-LIST] Clock signal termination - Lucas Bossetti
[SI-LIST] CAT-5 cable characteristics - zanella, fabrizio
[SI-LIST] [SI-LIST]: Wired-AND VS Wired-OR logic - Anand . Kuriakose
[SI-LIST] Re: [SI-LIST]: Wired-AND VS Wired-OR logic - Sunil Kumar
[SI-LIST] Re: Clock signal termination - Ingraham, Andrew
[SI-LIST] Re: [SI-LIST]: Wired-AND VS Wired-OR logic - Abhijit Mahajan
[SI-LIST] Re: [SI-LIST]: Wired-AND VS Wired-OR logic - Lieby David
[SI-LIST] [Re: [SI-LIST]: Wired-AND VS Wired-OR logic] - Abhijit Mahajan
[SI-LIST] Re: Wired-AND VS Wired-OR logic - Ingraham, Andrew
[SI-LIST] Re: Clock signal termination - Ingraham, Andrew
[SI-LIST] Re: SSO pushout, ground bounce definition - Steve Corey
[SI-LIST] Re: Clock signal termination - Vinu Arumugham
[SI-LIST] Parametric sweep in Scratch pad - Sivakumar S. - CTD, Chennai.
[SI-LIST] Re: SSO pushout, ground bounce definition - Kai, Francis
[SI-LIST] Re: SSO pushout, ground bounce definition - Alex McPheeters
[SI-LIST] Re: SSO pushout, ground bounce definition - Kai, Francis
[SI-LIST] Re: SSO pushout, ground bounce definition - Richard A. Schumacher
[SI-LIST] Ibis model motorola 68040? - Javier del Valle
[SI-LIST] Clock and data/Address signals simulation - Joe Young
[SI-LIST] Eric Bogatin's article - Sainath Nimmagadda
[SI-LIST] Looking for a Sr Level SI Engineer - ed . smay
[SI-LIST] Re: Clock and data/Address signals simulation - Inmyung Song
[SI-LIST] Re: Clock and data/Address signals simulation - Bill Hargin
[SI-LIST] Eric Bogatin's article on transmission line characteristic impedance - Eric Bogatin
[SI-LIST] kapton coaxial cable heating question. - C Deibele
[SI-LIST] Trace Bends - Ched-Chang Chai
[SI-LIST] Re: Trace Bends - steve weir
[SI-LIST] Re: Trace Bends - Ritchey Lee
[SI-LIST] Re: Trace Bends - Wojciech_Babij
[SI-LIST] Complex topology - Lucas Bossetti
[SI-LIST] - Jan Vercammen
[SI-LIST] Comment on Radiation from Bends - Christian Schuster




[ Home | Signup | Help | Login | Archives | Lists ]

All trademarks and copyrights within the FreeLists archives are owned by their respective owners.
Everything else ©2007 Avenir Technologies, LLC.