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[SI-LIST] Re: Raltion between tr to tpd for buffer

  • From: "Gil Simsic \(SBC\)" <gil.simsic@xxxxxxxxxxxxx>
  • To: "Narayane Manish Shivdas, TLS,Chennai" <manishsn@xxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Thu, 6 Mar 2008 08:13:34 -0800
Greetings Manish



There is indeed a relationship between the Tpd and the Tr, but in some IO 
standards, or IO cells it might be minute and negligible.

Your question is very generic and since you did not point out a specific 
standard or technology I will give you my generic analogy -



The Tr defines the change of voltage per time of the input signal to an IO 
cell. As all IO cells build of transistors, either CMOS or TTL, they are 
bound to the basic rules of - once you pass a specific threshold, you bias 
the junction in a way that it will either be active or saturated (I simplify 
it of course)



So when the input to an IO cell changes from low to high (i.e. Tr) the 
various transistors' biasing will change.

So simply putting it, the rate of change (Tr) will dictate how fast they 
will move from saturation to active for instance, and through the linear 
stage of the Tr there will be a linear influence on those transistors.



Hope it helps



Gil



----- Original Message ----- 
From: "Narayane Manish Shivdas, TLS,Chennai" <manishsn@xxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Thursday, March 06, 2008 7:55 AM
Subject: [SI-LIST] Raltion between tr to tpd for buffer


> Hello All,
>
>             I am doing signal integrity analysis. Can I come to know
> the should be relation between the maximum and min propagation delay of
> the input signal to the buffer propagation delay.
>
>
>
> Thanks & Regards,
>
> Manish
>
>
>
>
>
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