FreeLists / si-list / [SI-LIST] Re: How to Route XFP 10G electrical trace?

["CHUNG Yee" <Yee.Chung@xxxxxxxxxxxxxxxxxx>]

All,
Thank you for the valuable suggestions!

Yee
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Lee Ritchey
Sent: Friday, March 09, 2007 7:30 PM
To: Jeff Seeger; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: How to Route XFP 10G electrical trace?

Why not put those traces on layer 2?  Get at them with a laser via at
both ends.  Problem solved.


> [Original Message]
> From: Jeff Seeger <jseeger@xxxxxxxxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Date: 3/9/2007 9:45:27 AM
> Subject: [SI-LIST] Re: How to Route XFP 10G electrical trace?
>
> Msg: #4 in digest
> Subject: [SI-LIST] How to Route XFP 10G electrical trace?
> Date: Thu, 8 Mar 2007 11:14:50 -0600
> From: "CHUNG Yee" <Yee.Chung@xxxxxxxxxxxxxxxxxx>
>
> > snip <
> > Based on internal discussion, we have some concern on the rear EMI=20
> > gasket of the XFP cage that might scratch-off the solder-mask over=20
> > time due to vibration hence short these traces to Gnd! However, I=20
> > have check various vendors test board and even the Intel reference=20
> > test board in the XFP MSA are using this method!
> > snip <
>
>       Soldermask should not be relied upon as a mechanical
>       insulator, as your instincts incline.  This does not
>       stop the practice though, until a product gets fully
>       scrutinized with respect to a comprehensive spec.
>
>       If the gasket can't be relieved in this exact area, I
>       would suggest a bit of Kapton tape where you cross it.
>
> --
> =20
>       Jeff Seeger                         Applied CAD Knowledge Inc
>       Chief Technical Officer                  Tyngsboro, MA  01879
>       jseeger "at" appliedcad "dot" com                978 649 9800
>
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