Date Index for si-list, 03-2007

[si-list] || [03-2007 Date Index] [03-2007 Thread Index]

[SI-LIST] How to get RLC matrix from spice model - Arai, Tadashi
[SI-LIST] Via filler - RameshK Cozerv IN HO
[SI-LIST] Re: How to get RLC matrix from spice model - Jory McKinley
[SI-LIST] Re: SI Tool Suggestion - dgun
[SI-LIST] Re: How to get RLC matrix from spice model - Saoer Sinaga
[SI-LIST] Testing method of differential intra-pair skew - changyifeng
[SI-LIST] Re: Testing method of differential intra-pair skew - art_porter
[SI-LIST] Re: How to get RLC matrix from spice model - Jason R. Miller
[SI-LIST] Re: Testing method of differential intra-pair skew - Jory McKinley
[SI-LIST] Re: How to get RLC matrix from spice model - Albert Ruehli
[SI-LIST] how to measure differential intra-pair skew - changyifeng
[SI-LIST] Termination Topology for Bidirectional Bus - Saril
[SI-LIST] interconnection technology - david stern
[SI-LIST] Re: Termination Topology for Bidirectional Bus - Hiten Bhagat
[SI-LIST] Re: Termination Topology for Bidirectional Bus - Vishnu Mohan
[SI-LIST] Re: interconnection technology - Scott McMorrow
[SI-LIST] Re: Termination Topology for Bidirectional Bus - Erin . McPhalen
[SI-LIST] Re: Testing method of differential intra-pair skew - Loyer, Jeff
[SI-LIST] Re: interconnection technology - Barnes, Heidi
[SI-LIST] Re: Termination Topology for Bidirectional Bus - Lynne D. Green
[SI-LIST] Re: PCB Trace impedance algorithms - Free trace calculator - Salkow, Steven
[SI-LIST] Re: Termination Topology for Bidirectional Bus - steve weir
[SI-LIST] Re: PCB Trace impedance algorithms - Free trace calculator - Dennis Han
[SI-LIST] Consulting - Jory McKinley
[SI-LIST] Oscillation killer - Roger . Delbue
[SI-LIST] Re: Oscillation killer - Ray Anderson
[SI-LIST] Re: How to get RLC matrix from spice model - Grasso, Charles
[SI-LIST] MPX bus impedance - Santangelo, Steven
[SI-LIST] Re: Oscillation killer - Jory McKinley
[SI-LIST] Isolating pwb and chassis grounds - Doug Smith
[SI-LIST] Oscillation killer - Roger . Delbue
[SI-LIST] Buried capacitance and vias - Shawn Arnold
[SI-LIST] Google Power Engineer: EE board level dc-dc converters (Mtn View, CA) - Nancy Malone
[SI-LIST] Re: Buried capacitance and vias - steve weir
[SI-LIST] DesignCon 2007 podcast - Doug Smith
[SI-LIST] Question on 60Hz magnetic field strengths - Ray Anderson
[SI-LIST] IBIS Seminar - Lynne D. Green
[SI-LIST] SI/PI enginner position at Altera Pacakge Group - Geping Liu
[SI-LIST] Use of Li-ion batteries - Chockalingam Selvaraj
[SI-LIST] Re: Use of Li-ion batteries - Shawn Nikoukary
[SI-LIST] Re: Question on 60Hz magnetic field strengths - Nagel Michael-amn029
[SI-LIST] test - CHUNG Yee
[SI-LIST] How to Route XFP 10G electrical trace? - CHUNG Yee
[SI-LIST] Re: Use of Li-ion batteries - Ecklund, Tim
[SI-LIST] Re: Use of Li-ion batteries - Dodd, Ian
[SI-LIST] Re: How to get RLC matrix from spice model - Arai, Tadashi
[SI-LIST] MII to AUI interface PHY transceiver - avula.bhaskara
[SI-LIST] R: How to Route XFP 10G electrical trace? - gianguida
[SI-LIST] Propagation delay difference - jbtera77
[SI-LIST] Re: Propagation delay difference - john
[SI-LIST] Re: Propagation delay difference - Ihsan Erdin
[SI-LIST] Re: Propagation delay difference - Peterson, James F \(EHCOE\)
[SI-LIST] Re: Propagation delay difference - Lee Ritchey
[SI-LIST] Re: How to Route XFP 10G electrical trace? - Jeff Seeger
[SI-LIST] Re: How to Route XFP 10G electrical trace? - Kevin Ko
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - Jim Whitehead
[SI-LIST] Re: Propagation delay difference - William Kitchen
[SI-LIST] Re: How to Route XFP 10G electrical trace? - Lee Ritchey
[SI-LIST] Re: Propagation delay difference - Kihong Kim
[SI-LIST] Re: Propagation delay difference - Juliusz Poltz
[SI-LIST] Re: Propagation delay difference - istvan novak
[SI-LIST] Re: Propagation delay difference - Kihong Kim
[SI-LIST] SI Symposium - Clewell, Craig
[SI-LIST] Re: SI Symposium - Clewell, Craig
[SI-LIST] European IBIS Summit @ DATe 2007 - Second Call for Participation - Ralf Bruening
[SI-LIST] Re: Propagation delay difference - Xu, Yue
[SI-LIST] Express of Infiniband in the backplane - rbmerrit
[SI-LIST] DecapPlacement - Sreekanth N nampoothiri
[SI-LIST] Re: DecapPlacement - Jory McKinley
[SI-LIST] Re: How to Route XFP 10G electrical trace? - CHUNG Yee
[SI-LIST] Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Propagation delay difference - steven.d.corey
[SI-LIST] Re: Jitter transfer vs. accumulation - Paul Levin
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Paul Levin
[SI-LIST] Re: Jitter transfer vs. accumulation - Dhamija Naresh-B07930
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Diff Tight vs Loosely coupled - Rajan HS
[SI-LIST] Re: Diff Tight vs Loosely coupled - steve weir
[SI-LIST] Re: Propagation delay difference - Ihsan Erdin
[SI-LIST] Re: Diff Tight vs Loosely coupled - David Banas
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Vinu Arumugham
[SI-LIST] Re: Jitter transfer vs. accumulation - Vinu Arumugham
[SI-LIST] Hello, Assistance Required - Nitin Sharma
[SI-LIST] Re: Jitter transfer vs. accumulation - Vinu Arumugham
[SI-LIST] Re: Jitter transfer vs. accumulation - Paul Levin
[SI-LIST] Re: Propagation delay difference - Ken Cantrell
[SI-LIST] Re: Propagation delay difference - Ihsan Erdin
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] republican microscopy - Demetriush Hooks
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Propagation delay difference - steven.d.corey
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: DecapPlacement - Jack Olson
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: DecapPlacement - steve weir
[SI-LIST] Source synchronous interface delay measurement - QU Perry
[SI-LIST] Re: DecapPlacement - Jack Olson
[SI-LIST] OLL coupon for "What is Characteristic Impedance" - Eric Bogatin
[SI-LIST] Re: OLL coupon BTS115 - Eric Bogatin
[SI-LIST] AMD Characterization Engineer - jworth
[SI-LIST] Re: DecapPlacement - Lee Ritchey
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Vinu Arumugham
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: DecapPlacement - Jim Whitehead
[SI-LIST] Re: Propagation delay difference - Ihsan Erdin
[SI-LIST] Re: DecapPlacement - William Kitchen
[SI-LIST] Re: Jitter transfer vs. accumulation - Alfred P. Neves
[SI-LIST] Re: DecapPlacement - Scott McMorrow
[SI-LIST] Re: Propagation delay difference - steven.d.corey
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - Javier DeLaCruz
[SI-LIST] Re: DecapPlacement - Javier DeLaCruz
[SI-LIST] Re: DecapPlacement - steve weir
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - QU Perry
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - Vinu Arumugham
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - Ming Tsai
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - QU Perry
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - QU Perry
[SI-LIST] Re: R: How to Route XFP 10G electrical trace? - Vinu Arumugham
[SI-LIST] Re: unsubscribe now! please - tom foy
[SI-LIST] Re: Jitter transfer vs. accumulation - Alfred P. Neves
[SI-LIST] Suggested References for Jitter transfer vs. accumulation - Alfred P. Neves
[SI-LIST] Re: Source synchronous interface delay measurement - Doug Burns
[SI-LIST] Re: Source synchronous interface delay measurement - QU Perry
[SI-LIST] Re: Source synchronous interface delay measurement - Gang Zhao
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Alfred P. Neves
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - steve weir
[SI-LIST] High Speed PCB and System Design Course in Austin, Texas - Lee Ritchey
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] impedance and Characteristic impedance - nagaraj
[SI-LIST] SI job opening in Intel - Bangalore, India - Nanal, Sandesh
[SI-LIST] Re: impedance and Characteristic impedance - Tom Dagostino
[SI-LIST] Re: impedance and Characteristic impedance - Peterson, James F \(EHCOE\)
[SI-LIST] Re: impedance and Characteristic impedance - Eric Bogatin
[SI-LIST] Re: impedance and Characteristic impedanece - Bill Jones
[SI-LIST] Fwd: Re: impedance and Characteristic impedanece - Bill Jones
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - steve weir
[SI-LIST] Re: Jitter transfer vs. accumulation - Alfred P. Neves
[SI-LIST] Good book about jitter.... - Henrik Madsen
[SI-LIST] Re: Good book about jitter.... - Ralph A Wilson III
[SI-LIST] Re: Good book about jitter.... - istvan novak
[SI-LIST] Re: Good book about jitter.... - Buhrow, Benjamin
[SI-LIST] Re: Good book about jitter.... - Mark Randol
[SI-LIST] Clocking Architecture and Oscillator jitter.... - Leonard Dieguez
[SI-LIST] Re: impedance and Characteristic impedance - Abe (Abbas) Riazi
[SI-LIST] Re: Good book about jitter.... - Alfred P. Neves
[SI-LIST] Free Seminar on Buried Capacitance applications during PCB West - George Dudnikov
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Yafei Bi
[SI-LIST] Regarding Loop simulator. - Vijay Anand
[SI-LIST] Regarding Loop simulator. - RameshK Cozerv IN HO
[SI-LIST] Re: Jitter transfer vs. accumulation - istvan novak
[SI-LIST] Al Neves of Teraspeed Consulting and Eric Bogatin at the Agilent Roadshow - Scott McMorrow
[SI-LIST] Re: Jitter transfer vs. accumulation - Scott McMorrow
[SI-LIST] Google: Hiring SI Engineers, Mountain View, CA - Nancy Malone
[SI-LIST] Re: Jitter transfer vs. accumulation - Vinu Arumugham
[SI-LIST] Re: Jitter transfer vs. accumulation - Scott McMorrow
[SI-LIST] Re: Jitter transfer vs. accumulation - Mark Randol
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Istvan Novak
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Istvan Novak
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Steve Waldstein
[SI-LIST] Re: Jitter transfer vs. accumulation - istvan novak
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Jitter transfer vs. accumulation - Tang, George
[SI-LIST] Re: Jitter transfer vs. accumulation - istvan novak
[SI-LIST] Re: Jitter transfer vs. accumulation - Alfred P. Neves
[SI-LIST] FREE SEMINAR: Tuesday 3/27/07 Noon-2PM (Santa Clara) - Bob McCreight
[SI-LIST] Insertion and Return Loss - Avtaar Singh
[SI-LIST] Using Load Switching FETs - Jim Hall
[SI-LIST] Re: Using Load Switching FETs - Kenneth W. Egan
[SI-LIST] Why 4-way cross in schematic to be avoided - Varatharajan M-TLS,Chennai
[SI-LIST] Re: Insertion and Return Loss - Jory McKinley
[SI-LIST] timing analysis - Athidhi
[SI-LIST] Re: Using Load Switching FETs - steve weir
[SI-LIST] Re: timing analysis - steve weir
[SI-LIST] Re: Jitter transfer vs. accumulation - Craig Twardy
[SI-LIST] Re: Jitter transfer vs. accumulation - Steven Kan
[SI-LIST] Re: Why 4-way cross in schematic to be avoided - Lynne D. Green
[SI-LIST] Re: Jitter transfer vs. accumulation - art_porter
[SI-LIST] Bounded vs Unbounded jitter (was : Jitter transfer vs. accumulation) - Chris Cheng
[SI-LIST] Re: Bounded vs Unbounded jitter (was : Jitter transfer vs. accumulation) - art_porter
[SI-LIST] Re: Jitter transfer vs. accumulation - Scott McMorrow
[SI-LIST] Re: Jitter transfer vs. accumulation - Chris Cheng
[SI-LIST] Re: Bounded vs Unbounded jitter (was : Jitter transfer vs. accumulation) - Alfred P. Neves
[SI-LIST] Re: Why 4-way cross in schematic to be avoided - Jim Whitehead
[SI-LIST] Re: Jitter transfer vs. accumulation - art_porter
[SI-LIST] Wolfgang Maichen/USW/Teradyne is out of the office. - wolfgang . maichen
[SI-LIST] Re: Insertion and Return Loss - Avtaar Singh
[SI-LIST] Creating local power planes - Jim Hall
[SI-LIST] Re: timing analysis - Arun Kumar P N
[SI-LIST] Re: timing analysis - Jory McKinley
[SI-LIST] Reference ground plane below ethernet differential pairs - good or bad? - Kbalasubramanian
[SI-LIST] noise analysis - navaram kumar
[SI-LIST] Re: Reference ground plane below ethernet differential pairs - good or bad? - steve weir
[SI-LIST] European IBIS Summit @ DATe 2007 - Thrid Call for Participation - Ralf Bruening
[SI-LIST] Re: Bounded vs Unbounded jitter (was : Jitter transfer vs. accumulation) - Dave Instone
[SI-LIST] Re: Reference ground plane below ethernet differential pairs - good or bad? - Curt McNamara
[SI-LIST] DDR timing equation question - BOUTHEMY JEAN PIERRE
[SI-LIST] Re: Reference ground plane below ethernet differential pairs - good or bad? - Ram Chundru
[SI-LIST] Re: DDR timing equation question - Yasir_Mirza
[SI-LIST] Macromodeling tools @ Politecnico di Torino, EMC group - Update - sivi\.cla\@libero\.it
[SI-LIST] Re: Bounded vs Unbounded jitter (was : Jitter transfer vs. accumulation) - Chris Cheng
[SI-LIST] Noise in ICs - Saoer Sinaga
[SI-LIST] ASIC characterization - Tang, George
[SI-LIST] USB 2.0 cable and connector model - rajeev.kommera
[SI-LIST] DDR2 inteface consultant needed - Robert Szumowicz
[SI-LIST] Join the Anatrim revolution - Everett Randall
[SI-LIST] Re: DDR2 inteface consultant needed - Yasir_Mirza
[SI-LIST] PCI-E Length Matching - Kenny Frohlich
[SI-LIST] Re: USB 2.0 cable and connector model - Ing. Giancarlo Guida
[SI-LIST] Re: PCI-E Length Matching - Kotson, Michael
[SI-LIST] Re: DDR2 inteface consultant needed - Robert Szumowicz
[SI-LIST] Re: DDR2 inteface consultant needed - Chris Johnson
[SI-LIST] Re: DDR2 inteface consultant needed - Robert Szumowicz
[SI-LIST] Re: DDR2 inteface consultant needed - Chris Johnson
[SI-LIST] Re: DDR2 inteface consultant needed - Robert Szumowicz
[SI-LIST] Re: DDR2 inteface consultant needed - Chris Johnson
[SI-LIST] IBIS model for 2mm connector - esayre
[SI-LIST] Future Directions in IC and Package Design Workshop (FDIP) - Ray Anderson
[SI-LIST] DDR2 input slew rate measurement - Frank (Weihuang) Wang
[SI-LIST] DDR2 input slew rate measurement - Frank (Weihuang) Wang
[SI-LIST] Re: Coplanar wave structure on PCB - Ludvik Kindl