Date Index for si-list, 03-2002

[si-list] || [03-2002 Date Index] [03-2002 Thread Index]

[SI-LIST] Spice model for power subsystem. - David Braendler
[SI-LIST] How does temperature and voltage change effect the output signal of the chip ? - Moore Mo (modaochun)
[SI-LIST] High Speed Serial Links Using LV Differential Receivers - Ron . J . Morneault
[SI-LIST] Re: Effect of USB attachment's current drawn through motherboard bypass network - John Barnes
[SI-LIST] Importance of Package Height - Steinkogler, Gary
[SI-LIST] Re: Even mode, common mode, and mode conversion - Doug Mckean
[SI-LIST] Re: Spice model for power subsystem. - Juergen Flamm
[SI-LIST] Re: Even mode, common mode, and mode conversion - Steve Corey
[SI-LIST] Re: Spice model for power subsystem. - Aubrey_Sparkman
[SI-LIST] Re: High Speed Serial Links Using LV Differential Receivers - steve weir
[SI-LIST] Signal Integrity Engineer position open at Chelsio Communications - Lisa Williamson
[SI-LIST] Re: High Speed Serial Links Using LV Differential Receivers - D. C. Sessions
[SI-LIST] Re: LC values for IBIS generation: mutual, self, or both? - Neeraj Pendse
[SI-LIST] Re: Optimal Power/ground lauout for a 2-layer PCB - Neeraj Pendse
[SI-LIST] Re: Inductance of Various Capacitor Paxkages - Neeraj Pendse
[SI-LIST] FREE-FEM - C Deibele
[SI-LIST] Re: Importance of Package Height - Brent DeWitt
[SI-LIST] Re: Importance of Package Height - steve weir
[SI-LIST] GMII timings - Ramesh . Reddy
[SI-LIST] Re: FREE-FEM - Tadashi Arai
[SI-LIST] FFT/iFFT tool (for FREE) - Tadashi Arai
[SI-LIST] Re: FFT/iFFT tool (for FREE) - Al Davis
[SI-LIST] Re: Inductance of Various Capacitor Paxkages - Tauscher, Brian
[SI-LIST] Re: FREE-FEM - Dan Swanson
[SI-LIST] LVDS output impedance and teminations - Fritz, Karl E.
[SI-LIST] Re: Importance of Package Height - John Barnes
[SI-LIST] Re: Inverting PWL Current sources in HPSice - Ken Beach
[SI-LIST] Re: Importance of Package Height - Ingraham, Andrew
[SI-LIST] E-M SOLVERS - HOW DO THEY WORK? - Steve Rogers
[SI-LIST] Re: Inverting PWL Current sources in HPSice - Kim Helliwell
[SI-LIST] Split planes - Roberto Carretta
[SI-LIST] Re: E-M SOLVERS - HOW DO THEY WORK? - Jian X. Zheng
[SI-LIST] Re: Split planes - Ron Mancuso
[SI-LIST] Re: FREE-FEM - Ray Anderson
[SI-LIST] Even mode and common mode - Doug Brooks
[SI-LIST] Re: Even mode and common mode - C Deibele
[SI-LIST] Re: Even mode and common mode - Knighten, Jim L
[SI-LIST] Re: FFT/iFFT tool (for FREE) - Tadashi Arai
[SI-LIST] Re: FREE-FEM - Tadashi Arai
[SI-LIST] Re: Even mode and common mode - Dan Swanson
[SI-LIST] Re: Importance of Package Height - John Barnes
[SI-LIST] OUtput impedance measurement - Himanshu Arora
[SI-LIST] Re: Even mode and common mode - Knighten, Jim L
[SI-LIST] Start-up opening - Ed Priest
[SI-LIST] Has any one taken the Todd Hubing UMR video course on EMC..... - Michael_Greim
[SI-LIST] SiQual Design Con Papers Posted - Dave Macemon
[SI-LIST] VIA L and C values. - Umesha
[SI-LIST] Re: VIA L and C values. - Baranauskas, Dave
[SI-LIST] SI for a LVDS system - Mvvijay
[SI-LIST] help - Waleed Abdel-Hameed
[SI-LIST] Re: VIA L and C values. - Rich Peyton
[SI-LIST] Even mode and common mode- SI and EMC worlds - Eric Bogatin
[SI-LIST] X2Y 'zero' inductance caps - S Tatlow
[SI-LIST] Re: VIA L and C values. - Dunbar, Tony
[SI-LIST] lee richey course etc - Robison Michael R CNIN
[SI-LIST] Re: lee richey course etc - Michael_Greim
[SI-LIST] Re: lee richey course etc - Dave Macemon
[SI-LIST] Re: lee richey course etc - Bill Hargin
[SI-LIST] Specifying Clock to Out delay in IBIS Files - Abhijit Mahajan
[SI-LIST] C_comp in IBIS - Pritchard, Jason
[SI-LIST] Re: VIA L and C values. - Pat Diao
[SI-LIST] Re: (no subject) - Mark Alexander
[SI-LIST] AC coupling capacitors - Bob Patel
[SI-LIST] Re: lee richey course etc - Jim Hanson
[SI-LIST] XTK analysis-help - Sivakumar S. - CTD, Chennai.
[SI-LIST] help , about boardside coupling impendence calc - qzheng
[SI-LIST] Re: VIA L and C values. - Umesha
[SI-LIST] Re: XTK analysis-help - Wilco Hamhuis
[SI-LIST] Spiral inductor L and Q measurement with VNA - Rafael Martinez
[SI-LIST] Re: Importance of Package Height - John Barnes
[SI-LIST] Re: Spiral inductor L and Q measurement with VNA - Dan Swanson
[SI-LIST] Re: VIA L and C values. - Keskinen, Kai
[SI-LIST] Re: VIA L and C values. - Rich Peyton
[SI-LIST] Re: VIA L and C values. - Clewell, Craig
[SI-LIST] Series MOSFET IBIS models in SigXplorer - Hassan Ali
[SI-LIST] Re: Spiral inductor L and Q measurement with VNA - Randol Mark-ryvw50
[SI-LIST] Re: VIA L and C values. - Dima Smolyansky
[SI-LIST] Re: lee richey course etc - Lfresearch
[SI-LIST] Re: Has any one taken the Todd Hubing UMR video course on EMC..... - Peterson, George W
[SI-LIST] Re: Series MOSFET IBIS models in SigXplorer - Hassan Ali
[SI-LIST] Re: Series MOSFET IBIS models in SigXplorer - Mike LaBonte
[SI-LIST] Re: Using S-parameter files in HSPICE - Ted Mido
[SI-LIST] Re: lee richey course etc - Ritchey Lee
[SI-LIST] Re: Hspice encryption - Tracy Barclay
[SI-LIST] Re: C_comp in IBIS - Brad Griffin
[SI-LIST] Loss requirements in Infiniband spec... - ruston, matt
[SI-LIST] capacitive coupling to cables - Douglas C. Smith
[SI-LIST] Re: Importance of Package Height - Abe Riazi
[SI-LIST] Re: Importance of Package Height - EMCCOMPLY
[SI-LIST] Re: Importance of Package Height - John Barnes
[SI-LIST] Re: Importance of Package Height - Abe Riazi
[SI-LIST] SSTL2 characterisation - rajat . chauhan
[SI-LIST] Loss requirements in Infiniband spec. (si-list Digest V2 #70) - Jay Diepenbrock
(no subject) - Goutham . S
[SI-LIST] Re: (no subject) - Alan Hilton-Nickel
[SI-LIST] Model File - Himanshu Arora
[SI-LIST] 576MHz board design - Robison Michael R CNIN
[SI-LIST] Re: (no subject) - Robert Sefton
[SI-LIST] Re: (no subject) - Girish Bangalore
[SI-LIST] Re: (no subject) - Chris Cheng
[SI-LIST] Re: (no subject) - Brent DeWitt
[SI-LIST] Re: (no subject) - Chris Cheng
[SI-LIST] Re: (no subject) - scott
[SI-LIST] Crosstalk - Ched-Chang Chai
[SI-LIST] clearance - Waleed Abdel-Hameed
[SI-LIST] 576MHz board design... again - Robison Michael R CNIN
[SI-LIST] trace configuration ?? - Robison Michael R CNIN
[SI-LIST] Re: Importance of Package Height - ldsmith
[SI-LIST] Re: (no subject) - Sainath Nimmagadda
[SI-LIST] Looking for someone I can bounce some ansoft questions off of off line..... - Michael_Greim
[SI-LIST] Help On High Speed Interconnections - Giovanni Galiero
[SI-LIST] EMI Test Lab - Seol, Byongsu
[SI-LIST] Re: trace configuration ?? - Michael J. Degerstrom
[SI-LIST] SpectraQuest Question. - fname lname
[SI-LIST] Re: SpectraQuest Question. - Todd Westerhoff
[SI-LIST] SPECCTRAQuest: DC level shift with series caps - Hassan O. Ali
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Sanchez, Louis
[SI-LIST] SSO Analysis - scuba snail
[SI-LIST] Re: SpectraQuest Question. - Moran, Brian P
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Patrick_Carrier
[SI-LIST] Generating PRBS - Vadim Heyfitch
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - C. Kumar
[SI-LIST] Re: Generating PRBS - Ray Anderson
[SI-LIST] Re: Generating PRBS - Vadim Heyfitch
[SI-LIST] Re: Generating PRBS - Ray Anderson
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Hassan Ali
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Hassan Ali
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Hassan Ali
[SI-LIST] microstrip and stripline FREE-FEM examples - C Deibele
[SI-LIST] SSO Analysis - rajat . chauhan
[SI-LIST] SQ Question. - fname lname
[SI-LIST] Re: SQ Question. - Bob Patel
[SI-LIST] Re: SQ Question. - Paglia, Frank M
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Alan Hilton-Nickel
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Bob Patel
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Sanchez, Louis
[SI-LIST] Re: SQ Question. - Todd Westerhoff
[SI-LIST] Re: SQ Question. - fname lname
[SI-LIST] Re: SPECCTRAQuest: DC level shift with series caps - Hassan Ali
[SI-LIST] Signal Integrity Venues - EADS,RICK (A-ColSprings,ex1)
[SI-LIST] FWD: Re: Re: SPECCTRAQuest: DC level shift with series caps - Hassan Ali
[SI-LIST] Re: SQ Question. - Issa, Elie
[SI-LIST] Re: SQ Question. - Aubrey_Sparkman
[SI-LIST] Decoupling Capacitors - Gil Gafni
[SI-LIST] PECL to ECL at 1GHz+ - Bradley S Henson
[SI-LIST] Specctraquest Model ? - Ken Beach
[SI-LIST] Re: Specctraquest Model ? - Mike LaBonte
[SI-LIST] Fourier Series, trapeziod - Doug Brooks
[SI-LIST] Re: Embedded Passives - Smith, Norm W
[SI-LIST] Re: Decoupling Capacitors - Dave Anthony
[SI-LIST] Re: Specctraquest Model ? - John Horner
[SI-LIST] Re: re - Abdulrahman A. Rafiq
[SI-LIST] unsubsribe - Abdulrahman A. Rafiq
[SI-LIST] Re: Fourier Series, trapeziod - Doug McKean
[SI-LIST] Non monotonic EDGE on Clocks - Alokby, Ahmed
[SI-LIST] Re: Non monotonic EDGE on Clocks - Jim Freeman
[SI-LIST] Re: Specctraquest Model ? - Tadashi Arai
[SI-LIST] Re: Importance of Package Height - Abe Riazi
[SI-LIST] Re: Fourier Series, trapeziod - HaroldLSJ
[SI-LIST] Re: Decoupling Capacitors - Bill Hargin
[SI-LIST] Re: Non monotonic EDGE on Clocks - Jeremy Plunkett
[SI-LIST] Re: Fourier Series, trapeziod - Keskinen, Kai
[SI-LIST] Re: Fourier Series, trapeziod - C Deibele
[SI-LIST] Re: Fourier Series, trapeziod Found it!! - Doug Brooks
[SI-LIST] Need for SI Service Bureaus? - Shawn Arnold
[SI-LIST] Re: Need for SI Service Bureaus? - Patrick O'Shea
[SI-LIST] Re: Need for SI Service Bureaus? - Jeff Seeger
[SI-LIST] Re: Need for SI Service Bureaus? - Todd Westerhoff
[SI-LIST] Re: Need for SI Service Bureaus? - Philip Germann
[SI-LIST] Re: Need for SI Service Bureaus? - Doug Brooks
[SI-LIST] Re: Need for SI Service Bureaus? - Jon Powell
[SI-LIST] Re: Need for SI Service Bureaus? - Hassan O. Ali
[SI-LIST] Re: Importance of Package Height - Abe Riazi
[SI-LIST] Re: Importance of Package Height - Zabinski, Patrick J.
[SI-LIST] Power Supply Layout - Vrla, Cliff
[SI-LIST] Re: Importance of Package Height - Tony Anthony
[SI-LIST] Re: Importance of Package Height - Larry Smith
[SI-LIST] Re: Importance of Package Height - Zhiping Yang
[SI-LIST] Re: Importance of Package Height - Larry Smith
[SI-LIST] Re: Importance of Package Height - Zhiping Yang
[SI-LIST] Re: Need for SI Service Bureaus? - Dave Macemon
[SI-LIST] Determining Edge rate - Tabatchnick, Justin
[SI-LIST] Series termination value - SEOW,ERWIN-SP (HP-Singapore,ex6)
[SI-LIST] Connector for LVDS - Steve Wolcott
[SI-LIST] Re: Connector for LVDS - Michael_Greim
[SI-LIST] Re: Connector for LVDS - James_R_Jones
[SI-LIST] Re: Connector for LVDS - bala iyer
[SI-LIST] Connector for LVDS - Steve Wolcott
[SI-LIST] Re: Series termination value - Bill Chen
[SI-LIST] Re: Importance of Package Height - Larry Smith
[SI-LIST] Re: Series termination value - JNH
[SI-LIST] Re: Connector for LVDS - Ron . J . Morneault
[SI-LIST] Re: Series termination value - Ingraham, Andrew
[SI-LIST] Re: Need for SI Service Bureaus? - Joe Socha
[SI-LIST] Re: Importance of Package Height - Brent DeWitt
[SI-LIST] Few analog power supplies, where to short it. - Yehuda Yizraeli
[SI-LIST] Re: Few analog power supplies, where to short it. - Bill Chen
[SI-LIST] SI tool for a particular layer stackup - Craciun, Liviu-Dumitru
[SI-LIST] see the attached PDF-File - SI tool for a particular layer stackup - Craciun, Liviu-Dumitru
[SI-LIST] ASIC PKG for PCI-X - Smith, Norm W
[SI-LIST] Re: Turn on oscillation power analysis - Michael Nudelman
[SI-LIST] Re: Turn on oscillation power analysis - Ray Anderson
[SI-LIST] ISI simulation in SCRATCHPAD (XTK) - Siva kumar
[SI-LIST] Re: Series termination value - Ingraham, Andrew
[SI-LIST] Re: Series termination value - Sanchez, Louis
[SI-LIST] Re: Series termination value - Tabatchnick, Justin
[SI-LIST] Re: Series termination value - Tabatchnick, Justin
[SI-LIST] Series termination value - Tabatchnick, Justin
[SI-LIST] Re: Series termination value - Tabatchnick, Justin
[SI-LIST] Re: Series termination value - Bill Dempsey
[SI-LIST] Re: Series termination value - sweir
[SI-LIST] Re: Importance of Package Height - Abe Riazi
[SI-LIST] Re: Series termination value - Ingraham, Andrew
[SI-LIST] Re: ISI simulation in SCRATCHPAD (XTK) - Wilco Hamhuis
[SI-LIST] simulation in SCRATCHPAD - k EPD
[SI-LIST] Job opening - Ozgur Misman
[SI-LIST] Re: Turn on oscillation power analysis - pwelling
[SI-LIST] inter-power-converter coupling - Zabinski, Patrick J.
[SI-LIST] IBIS Model Quality (or lack thereof) - Todd Westerhoff
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Kim Helliwell
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Waseem Tariq
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Chris Cheng
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Todd Westerhoff
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - pwelling
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Peterson, James F (FL51)
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Adam . Tambone
[SI-LIST] Re: IBIS Model Quality (or lack thereof)- Cleansing service - Joe Socha
[SI-LIST] logic analyzer probes on LVDS - evillaf
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Dunbar, Tony
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Mike Mayer
[SI-LIST] Fwd: IBIS Model Quality (or lack thereof) - Dave Macemon
[SI-LIST] Re: logic analyzer probes on LVDS - Robert Sefton
[SI-LIST] Looking for Teradyne SI contact information....... - Michael_Greim
[SI-LIST] Re: Looking for Teradyne SI contact information....... - Stephen Zinck
[SI-LIST] Re: Looking for Teradyne SI contact information....... - Bob Patel
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Jeremy Plunkett
[SI-LIST] Interpretation of XTK results - Joe Young
[SI-LIST] TDR's and ESD Protection - JOHN SAWDY
[SI-LIST] Re: logic analyzer probes on LVDS - Muhammad Sagarwala
[SI-LIST] Re: Interpretation of XTK results - Bill Hargin
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Jim Freeman
[SI-LIST] Frequency spectrum of SONET data - Bob Patel
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Jeremy Plunkett
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Todd Westerhoff
[SI-LIST] Re: Frequency spectrum of SONET data - Paglia, Frank M
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Dave Macemon
[SI-LIST] Re: TDR's and ESD Protection - Loyer, Jeff W
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Hassan Ali
[SI-LIST] Re: TDR's and ESD Protection - Feldman, Richard
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Jeremy Plunkett
[SI-LIST] Re: TDR's and ESD Protection - Noel Verbiest
[SI-LIST] Re: TDR's and ESD Protection - Martyn Gaudion
[SI-LIST] High Speed Digital design education? - Inmyung Song
[SI-LIST] Re: Frequency spectrum of SONET data - Al Davis
[SI-LIST] Re: TDR's and ESD Protection - Ray Anderson
[SI-LIST] Re: High Speed Digital design education? - Devrim Fidanci
[SI-LIST] XTK error - Sivakumar S. - CTD, Chennai.
[SI-LIST] Re: XTK error - Wilco Hamhuis
[SI-LIST] Why does lamination fail to prevent eddy currents at high frequencies? - Steve Rogers
[SI-LIST] Re: TDR's and ESD Protection - Rich Peyton
Re: [SI-LIST] Re: TDR's and ESD Protection - Brian D. Butler
[SI-LIST] Re: Question on split termination - Dr. Howard Johnson
[SI-LIST] Re: XTK error - Marc Humphreys
[SI-LIST] S-parameter to SPICE - Hassan Ali
[SI-LIST] backplane connector - Dr. Howard Johnson
[SI-LIST] Re: S-parameter to SPICE - Clewell, Craig
[SI-LIST] Re: Why does lamination fail to prevent eddy currents at high frequencies? - Vinu Arumugham
[SI-LIST] Message submitted to 'si-list' - Ray Anderson
[SI-LIST] Re: TDR's and ESD Protection - Ray Anderson
[SI-LIST] Re: TDR's and ESD Protection - Rich Peyton
[SI-LIST] Re: backplane connector - Julian Ferry
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Kevin Fisher
[SI-LIST] Re: backplane connector - Michael_Greim
[SI-LIST] Stitching Capacitors, Split-planes & Return Currents ? - Simba Julian
[SI-LIST] IBIS MODEL QUESTION - =?big5?b?U3RhbmxleS5DaGl1KKr0q6uyTSk=?=
[SI-LIST] RDRAM termination - Dance Wu (netscape.net)
[SI-LIST] IBIS Model of the CMOS PECL ????? - 김치원
[SI-LIST] Re: Why does lamination fail to prevent eddy currents at high frequencies? - Steve Rogers
[SI-LIST] IBIS Model of the CMOS PECL ????? - 김치원
[SI-LIST] IBIS Model of the CMOS PECL ????? - 김치원
[SI-LIST] IBIS Model of the CMOS PECL ????? - 김치원
[SI-LIST] IBIS Model of the CMOS PECL ????? - 김치원
[SI-LIST] Re: Stitching Capacitors, Split-planes & Return Currents ? - Wang Xiao-yun
[SI-LIST] Re: Nagel's Thesis - Roberto Ciaranfi
[SI-LIST] Re: Importance of Package Height - Istvan Novak
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - herbert_lage
[SI-LIST] Re: RDRAM termination - Bob Patel
[SI-LIST] What should be checked on ASIC - Bob Patel
[SI-LIST] Re: RDRAM termination - Baranauskas, Dave
[SI-LIST] Re: Stitching Capacitors, Split-planes & Return Currents ? - Patrick_Carrier
[SI-LIST] Re: Why does lamination fail to prevent eddy currents at high frequencies? - Ritchey Lee
[SI-LIST] Re: Why does lamination fail to prevent eddy currents at high frequencies? - Ray Anderson
[SI-LIST] Re: RDRAM termination - Dance Wu (netscape.net)
[SI-LIST] Re: Nagel's Thesis - Ingraham, Andrew
[SI-LIST] Re: IBIS MODEL QUESTION - Ingraham, Andrew
[SI-LIST] Re: Why does lamination fail to prevent eddy currents at high frequencies? - Vinu Arumugham
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Ingraham, Andrew
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - pwelling
[SI-LIST] test - Vadim Heyfitch
[SI-LIST] ATA 100 bus simulation - =?big5?b?U3RhbmxleS5DaGl1KKr0q6uyTSk=?=
[SI-LIST] Re: ATA 100 bus simulation - Tadashi Arai
[SI-LIST] ISF2XTK error-Urgent-Urgent - Siva kumar
[SI-LIST] Re: ISF2XTK error-Urgent-Urgent - Wilco Hamhuis
[SI-LIST] Re: IBIS Model Quality (or lack thereof) - Charlotte &/or Roy Leventhal
[SI-LIST] Re: Importance of Package Height - Abe Riazi