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Thread Index for si-list, 02-2008

[si-list] || [02-2008 Date Index] [02-2008 Thread Index]

  1. [SI-LIST] Signal Integrity engineer needed - SanDisk, ilya shlimenzon
  2. [SI-LIST] Free Newsletter for High Speed Design Community, Timothy Coyle
  3. [SI-LIST] Need SPEED2000 User Manual, Pras
  4. [SI-LIST] IEEE-EMC Society-- Santa Clara Valley Chapter, February 2008 meeting. [Presenter: Steve Weir], Oscar Fallah
  5. [SI-LIST] DDR strobe to clock length matching, Nagy István
  6. [SI-LIST] Using Resonance to measure circit parameters - BNC barrel example, Doug Smith
  7. [SI-LIST] list etiquett, Doug Smith
  8. [SI-LIST] Presentations available from the IBIS Summit at DesignCon 2008!, Mirmak, Michael
  9. [SI-LIST] file conversion, Mohamad Haghtalab
  10. [SI-LIST] Re: What is meant by a differential signal, Ravindra Johari
  11. [SI-LIST] two DesignCon 2008 SI papers posted on BeTheSignal.com, Eric Bogatin
  12. [SI-LIST] Random behaiour of Virtex 4 FPGA, vijayan
  13. [SI-LIST] Test, Frances_Hart
  14. [SI-LIST] Test of new reply-to address, Ray Anderson
  15. [SI-LIST] Etiquette and other good intentions, Frances_Hart
  16. [SI-LIST] European IBIS Summit at DATe 2008 - Second Call for Call for Paticipation, Ralf Brüning
  17. [SI-LIST] mSPICE, navaram kumar
  18. [SI-LIST] Skin Effect on Power/ground Plane, jbtera77
  19. [SI-LIST] SGMII ROUTING LENGTH RESTRICTION, Vigneshwaran Ganesan, TLS-Chennai
  20. [SI-LIST] Re: Skin Effect on Power/ground Plane, olaney
  21. [SI-LIST] Cumulative Jitter Analysis, Veeralakshmanan Panneerselvam, TLS,Chennai
  22. [SI-LIST] Re: SGMII ROUTING LENGTH RESTRICTION, icer world
  23. [SI-LIST] Re: Cumulative Jitter Analysis, icer world
  24. [SI-LIST] Power Plane Impedance, stebla01
  25. [SI-LIST] transformers, Giuseppe Selli
  26. [SI-LIST] Re: transformers, olaney
  27. [SI-LIST] Capacitance of TVS in FE/GE application, Zhangkun
  28. [SI-LIST] Re: Capacitance of TVS in FE/GE application, olaney
  29. [SI-LIST] Hyperlynx modelling of 'wire over ground', Jennings, Kevin F
  30. [SI-LIST] TDR vs. VNA? Which to purchase?, Tom Cipollone
  31. [SI-LIST] Re: TDR vs. VNA? Which to purchase?, olaney
  32. [SI-LIST] Re: hi, gaurav kaushik
  33. [SI-LIST] 6 layers stackup, Fernando Yuitiro Mori
  34. [SI-LIST] Re: 6 layers stackup, Jory McKinley
  35. [SI-LIST] Open Rec at Xilinx, David Mahoney
  36. [SI-LIST] inter-cabinet connections, Stephen Greenhalgh
  37. [SI-LIST] How to do analysis for Clock signals, prasannna
  38. [SI-LIST] FW: Signal Integrity Opportunity - San Jose, CA, Ed Smay
  39. [SI-LIST] Re: using IBIS FILE which point is simulated?, Alexandre . AMEDEO
  40. [SI-LIST] Difference between FR-408 (Isola)and NP 4000-13EP, raja s
  41. [SI-LIST] Re: Difference between FR-408 (Isola)and NP 4000-13EP, Lee Ritchey
  42. [SI-LIST] connector design question, Jim Nadolny
  43. [SI-LIST] SI Engineer openning at Marvell Shanghai, Wei Zhou
  44. [SI-LIST] Is there any relationship between IBIS simulation accuracy and frequency?, icer world
  45. [SI-LIST] Differential Signals with changed ground references, ryansatrom
  46. [SI-LIST] Re: [!! SPAM] Re: 6 layers stackup, Lee Ritchey
  47. [SI-LIST] ICX / Connector IBIS files, crr1231
  48. [SI-LIST] Re: Differential Signals with changed ground references, Jory McKinley
  49. [SI-LIST] Improving Power Delivery Performance Seminar, March 19, 1:00pm~4:00pm, San Jose DoubleTree Hotel, Jin Zhao
  50. [SI-LIST] Re: HOW to use IBIS in HSPICE, deltaboy
  51. [SI-LIST] Summer intern, Doug Smith
  52. [SI-LIST] Re: Improving Power Delivery Performance Seminar, March 19, 1:00pm~4:00pm, San Jose DoubleTree Hotel, Jin Zhao
  53. [SI-LIST] Partnering opportunities for experienced waveform integrity engineers, Mike Williams



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