FreeLists / si-list / [SI-LIST] Re: PCB Fab Costs

[msharpes@xxxxxxxxxx]

 <http://www.merix.com/files/DFM Manual rev b.pdf>

-----Original Message-----
From: msharpes=20
Sent: Monday, February 12, 2007 2:50 PM
To: 'christopher.mcgrath@xxxxxxxxxxx'; si-list
Subject: RE: [SI-LIST] PCB Fab Costs

Chris - A good question.  Being on the design end this is always
something to be conscience of when sending a design off for fab.  For an
answer to this I had referred to DfM guides made by fab vendors.  One in
particular, Merix, used to publish a DfM guide on its website
(www.merix.com), but I see that the guide is no longer available, or
perhaps through NDA only?  The guide was structured in a way that gave a
complexity factor (they actually called it that) to different ranges of
capability for a certain attribute.  For instance, trace to trace
spacing, soldermask minimum feature size or aspect ratio.  So, by
looking at the spec and comparing it with your design you could at least
see where your design pushed the limits which may increase cost.  I
don't know of a good, current printed resource for this that is done in
this way, but in the absence of that you may want to hit the search
engines to look for DfM guides from some fab shops that do publish
those.

If nothing else, you could ask the shops you work with to provide an
IPC-1710 form (basically, a listing of capabilities) to establish a
baseline of capability so you know where their limits are.  From this
you would know that as you approach those limits or exceed them, cost
and/or producability would be affected.

Some of the items you bring up are simply cost drivers, not necessarily
complexity factors, but I suppose some are both (e.g. drill count, layer
count, panelization I would see more as cost drivers than complexity
factors.)

BTW, if anyone has a current link to that Merix DfM I'd be grateful for
a tip on that. ..mike

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Christopher McGrath
Sent: Monday, February 12, 2007 10:35 AM
To: si-list
Subject: [SI-LIST] PCB Fab Costs

We are in the process of developing some cost analysis tools for our PCB
costs and I was wondering if anybody out there had run across some
resources out there that were worth looking at. =20
=20

For instance, I am interested in any common methods for calculating some
kind of "complexity factor" based on common inputs such as layer count,
lamination cycles, panelization, board area, drill count, drill size,
etc. for cost and schedule planning and for comparing designs of varying
complexity.

=20

Thanks,

Chris

=20


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 =20

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