FreeLists / si-list / [SI-LIST] Re: Skewed Silicon Parameters

["Lynne D. Green" <lgreen22@xxxxxxxxxxxxxx>]

Hi, Steve,

The Fabless Semiconductor Association chapter in the San Jose area has had a
number of speakers address this topic.  Many parameters are highly
correlated (or anti-correlated) for P and N transistors.  If anyone is
interested, I might be able to find out who the speakers were.

Information on the FSA can be found at   http://www.fsa.org/

Best regards,
Lynne


"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs
http://www.greenstreakprograms.com
425-788-0412
lgreen22@xxxxxxxxxxxxxx

 

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Steve Horne
Sent: Tuesday, February 07, 2006 3:07 PM
To: james_r_jones@xxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Skewed Silicon Parameters


Some parameters (such as gate oxide thickness, poly gate
dimension) affect both N and P in the same direction, while others (such as
dopant implant variation, stress effects) may only affect one type or may
push the two types in opposite directions.

Because of this, the fab/foundry will often specify corners "fast-slow" and
"slow-fast" (P-N) in which the P and N parameters are not as extreme as they
are in the "fast-fast" and "slow-slow"
corners.

More sophisticated fabs will provide statistical models that you can use to
perform Monte Carlo simulations, allowing a handful of parameters to vary
independently and have their individual effect on N and P transistor
performance.

Steve

james_r_jones@xxxxxxxxx writes:
 >
 > Experts,
 >
 > There are numerous silicon parameters that can be  > skewed that will
affect the strength of the silicon. 
 > There are parameters that represent oxidation, channel  > length, doping,
etc.  
 >
 > Question is, do these parameters affect P and N type  > transistors
differently?  
 >
 > In our simulations, we skew 'process' to either fast  > or slow (or maybe
typical).  In reality, is it  > possible to have fast N-type ans slow P-type
or vice  > versa?  Why?  What process parameter combinations  > could cause
this to happen?  Do we need to cover this  > possibility in simulation?
 >
 > Thanks,
 > -James
 >
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