FreeLists / si-list / [SI-LIST] Re: Skewed Silicon Parameters

[Steve Horne <sch@xxxxxxxxxxxxxx>]

Some parameters (such as gate oxide thickness, poly gate
dimension) affect both N and P in the same direction, while
others (such as dopant implant variation, stress effects) may
only affect one type or may push the two types in opposite
directions.

Because of this, the fab/foundry will often specify corners
"fast-slow" and "slow-fast" (P-N) in which the P and N parameters
are not as extreme as they are in the "fast-fast" and "slow-slow"
corners.

More sophisticated fabs will provide statistical models that you
can use to perform Monte Carlo simulations, allowing a handful of
parameters to vary independently and have their individual effect
on N and P transistor performance.

Steve

james_r_jones@xxxxxxxxx writes:
 > 
 > Experts,
 > 
 > There are numerous silicon parameters that can be
 > skewed that will affect the strength of the silicon. 
 > There are parameters that represent oxidation, channel
 > length, doping, etc.  
 > 
 > Question is, do these parameters affect P and N type
 > transistors differently?  
 > 
 > In our simulations, we skew 'process' to either fast
 > or slow (or maybe typical).  In reality, is it
 > possible to have fast N-type ans slow P-type or vice
 > versa?  Why?  What process parameter combinations
 > could cause this to happen?  Do we need to cover this
 > possibility in simulation?
 > 
 > Thanks,
 > -James
 > 
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