FreeLists / si-list / [SI-LIST] Re: edge coupled coated microstrip differential impedance

["Loyer, Jeff" <jeff.loyer@xxxxxxxxx>]

I ran some quick sims with 2 tools that I've come to trust.  They came
within 2 ohms of each other.

According to them, your first stackup (both the original design and the
actual) should have given you a differential impedance of 86 with
soldermask, 96 without, assuming an Er of 4.2, which I usually do (using
a higher Er of 4.7 would have given an even lower impedance).  It agreed
with the 2nd vendor's calculations that the 7/7/9.5 stackup gives 101
ohms, assuming an Er of 4.7 (105 ohms w/ Er =3D 4.2).

So, according to my calculations, the first vendor's stackup shouldn't
have worked, and the 2nd one should.  But I'm not completely surprised
at the discrepancy.  I wonder what geometries you would actually find if
you cross-sectioned one of the "good" boards.  I wouldn't be surprised
to find that your vendor actually tweaked the trace widths to attain the
correct impedance.  According to my calculations, they could reduce the
trace width to 5.7 mils (and the spacing would grow to 5.3 mils) and get
100 ohms.  Another large source of error is assumptions about actual
geometries that get fed into the 2D solver. They can vary substantially
from what the artwork shows.  In your particular stackup, you have a
large amount of intra-pair coupling (~75 ohms single-ended, driven down
to 50 ohms odd mode), and the odd-mode impedance is going to be very
dependent on the actual cross section.  Representing the traces as
simple rectangles or even simple trapezoids may not be sufficient to
correlate measurements to field solver results.

The impedance measurement is also a large potential source of error.

Perhaps both vendors would give you the right impedance with their
corresponding geometries, but the actual geometries might be very
different from the artwork.  I've seen this before and have personally
given up trying to solve it in most cases - I give the vendors
geometries that are in the ballpark and expect the quotes from them to
vary quite a bit.  In your particular case, the variation is a bit more
than I'd accept, and I think you'll want to reconcile it before moving
on.

Regarding your last question, I wouldn't neglect the soldermask when
making calculations.  I would at least represent it in its simplest form
- a dielectric that extends about 0.4 mils above the top of the trace.
Better yet, have its shape conform somewhat to the shape of the trace.
But, don't bother getting too picky.  As you've found out, there's not
much point in adjusting geometries for 1% differences, when you're going
to see 10% differences (and more) between vendors.

As others have hinted at, the best bet is to have in place a means of
ensuring the actual traces on your board are meeting your target
impedance (not just the coupons).  Be prepared to double-check your
board vendors' results.

Obligatory Disclaimer:
The content of this message is my personal opinion only and although I
am an employee of Intel, the statements I make here in no way represent
Intel's position on the issue, nor am I authorized to speak on behalf of
Intel on this matter.

Good luck,
Jeff Loyer


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of jerry_hu@xxxxxxxxxxxx
Sent: Thursday, February 02, 2006 8:43 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] edge coupled coated microstrip differential impedance


Hi, Gurus,
I have couple of questions regarding the edge coupled coated microstrip
differential impedance.=20

Recently, I have designed a board with 100 Ohm differential impedance
microstrip. The design track width is 7mil, 4mil space edge to edge, 8.9
mil distance to the reference plane. The track thickness is 0.5oz plus
1oz plating. one local board shop made the boards for us. The actual
track width is 7mil, 4mil space and 8..4 distance to the reference
plane. The track thickness is 0.5oz plus 1 oz plating. The measurement
for these differential pairs on a coupon (6 inches) is 101 Ohm, which is
good.=20

We switched another board shop for the second spin. they told us that
the spacing have to be adjust from 4mil to 7mil in order to make 100 ohm
microstrip differential pair. Their calculations show the impedance with
my original design would give around 80 ohm. the parameters they were
using are, track width 7mil, spacing 4mil, 9.5mil distance to the
reference plane, track thickness 0.5mi plus 1.5 plating, 0.8mil solder
mask. The dielectric constant is 4.7 for their calculation.

Here are my questions:

1) why is the calculation and result so different between these two
board shop?

2) how much will solder mask effect the differential impedance on
microstrips? I know solder mask has some impact to the microstrip
impedance. Is that possible to be 20% difference?

3) If the solder mask or material or processing have such big impact to
microstrips, why the first board shop doesn't need to adjust to get 100
ohm?=20

My calculation is based on the edge coupled microstrip without counting
the solder mask coating. I thought it would be close enough for board
shop to adjust tracks according to their processing and make make
boards. But this makes me to rethink about this idea. Anyone has such
experience?

thanks and regards.

Jerry Hu



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