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[SI-LIST] Re: Query CMOS FPGA interface
- From: Alan Hilton-Nickel <alan@xxxxxxxxxxxxxxxxx>
- To: ha324005@xxxxxxxxx
- Date: Sat, 05 Feb 2005 13:43:39 -0800
All packages have some inductance and capacitance, and the package you
are looking at is pretty much typical. Unless I've missed some
cataclysmic change in packaging, I doubt your going to find something
that is "matched" to your driver.
You do not mention any transmission line parameters of length or
impedance, so I wonder if you are modeling the driver pin directly
connected to the FPGA pin. That's not realistic (you usually have some
length of PCB trace between the pins), but would be simplest from a
signal point of view, so you may have an issue with your HSPICE
parameters. You may need to check the step size, among other parameters.
Dennis Han posted a good summary on that subject to this list a couple
days ago.
You also mention looking at the output of the driver, but the point of
interest is the input of the receiver. You may want to reconfigure your
HSPICE deck to probe the receiver.
Alan Hilton-Nickel
Himanshu Arora wrote:
>Hello,
>
>I need to take output from IC and interface it with an
>FPGA and the question pertians to that.
>
>I have 1.8V rail-to-rail output from CMOS IC. It is a
>80MHz signal, duty cycle atleast 50%, rise time around
>1ns. The output driver in IC was designed assuming
>15pF cap load (to take into account the package
>capacitance, pcb track capacitance and the capaciatnce
>due to FPGA package). This output becomes clock signal
>for my FPGA.
>
>I made a model of the package assuming about 5nH
>bondwire inductance and 2nH package lead inductance
>(for an SOICE type package). on using this lumpled RLC
>model of package in HSpice simulations I see a lot of
>ringing in the output of the driver.
>
> Someone suggested me amkor MLF package with package
>inductance of about 2nH...
>
>I am wondering is FPGAs come in some similar kind of
>packages and if so how complicated this problem is of
>interfacing a CMOS rail-to-rail output with 1ns rise
>and fall time with an FPGA which can take 1.8V CMOS
>inputs? Bascially I am looking for the right package.
>
>Thanks for your help.
>
>Sincerely
>
>Himanshu Arora
>
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