FreeLists / si-list / [SI-LIST] Re: Input Clock phase noise and TX eye closurein SERDES

[john <johndp@xxxxxxxx>]

Andy,

I guess this is because the functions usually used to describe the phase 
noise are of the type 1/F^n, which
obviously tend to infinity as f tends to 0. However there is a 1998 
paper that has an alternative theory on
phase noise :-

Phase noise and timing jitter in oscillators,Demir, A. 
<http://ieeexplore.ieee.org/search/quicksrchresult.jsp?queryText=%28demir%20a.%3Cin%3Eau%29&valnm=Demir%2C+A.&ResultCount=15&SortField=Score&SortOrder=desc&reqloc=au>
   
Mehrotra, A. 
<http://ieeexplore.ieee.org/search/quicksrchresult.jsp?queryText=%28mehrotra%20a.%3Cin%3Eau%29&valnm=Mehrotra%2C+A.&ResultCount=15&SortField=Score&SortOrder=desc&reqloc=au>
   
Roychowdhury, J. 
<http://ieeexplore.ieee.org/search/quicksrchresult.jsp?queryText=%28roychowdhury%20j.%3Cin%3Eau%29&valnm=Roychowdhury%2C+J.&ResultCount=15&SortField=Score&SortOrder=desc&reqloc=au>
   

AT&T Bell Labs. Custom Integrated Circuits Conference, 1998., 
Proceedings of the IEEE 1998

My query is why the lower limit is set at say 10KHz as in say OC192, I 
guess I need to do the math  suggested by  Craig
for some insight .

Regards

John


Andrew Ingraham wrote:

>John,
>
>I don't know if this helps, and I'm not entirely certain that it's correct ...
>
>... but several years ago I remember reading in Gardner's PLL book that there
>are mathematical difficulties that aren't yet understood about low frequency
>phase noise.  I think he said that, in theory, if you do the math, a PLL cannot
>possibly stay in-lock because when you integrate the effect of the low 
>frequency
>noise on the PLL, the result is infinite (due to the increasing LF phase noise
>of the source).  Yet PLLs do seem to work and stay in lock.  He concluded that
>perhaps our understanding about noise spectra is incorrect, and more work is
>required.
>
>Regards,
>Andy
>
>
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