FreeLists / si-list / [SI-LIST] Re: fanout

[James_R_Jones@xxxxxxxx]

If I were to approach that problem, I would be interested in the current
drive capability of the driver, vs. the loading of each T-line/receiver
path.  I have seen gates used to drive multiple T-lines.  I have also seen
single T-lines delivering signals two multiple gates that are sort of fanned
out at the end of the T-line.

One thing to keep in mind is that the impedance looking into a T-line of
infinite length is its characteristic impedance.  For finite length T-line,
the impedance looking in is affected by the load and the frequency that the
driver is going to inject.

I have solved similar problems by setting up a spice simulation.  Basically,
you can look at the current leaving the driver during simulation, and see if
you are approaching the current driving capability.  

Basic rule of thumb, more loading=slower rise time, so you may want to check
the rise time requirement at the receiver.

James R. Jones
Dell

-----Original Message-----
From: Jayaprakash Balachandran [mailto:edpc108@xxxxxxxxx]
Sent: Tuesday, February 04, 2003 9:50 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] fanout



Hello Siers,

   How to decide the fanout capability of a driving
gate? In other words, when to decide a buffer is
required for driving the load? 


Thanks in advance,
Jayaprakash. 

=====
Balachandran Jayaprakash                             
Celestijnenlaan,                                                   
3/61, 3001, Heverlee,                                           
Leuven, Belgium.                                                  
Mobile: +32-472-630120

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