FreeLists / si-list / [SI-LIST] SI Job

["Pedro Gonzalez" <pedrog@xxxxxxxxxx>]

I have a lead to a Signal Integrity job in San Jose, CA.  Let me know if you
want more information.

Requirements:
?   BSEE with 7+ years of relevant experience or MSEE/Ph.D with 5+ years of
relevant experience
?   Successful proven track record of delivering high-end ASICs/SoCs to
production
?   In-depth knowledge of transmission line theory, SSO analysis, clock
distribution issues, IR/EM issues, on-chip power estimation/management
?   Expertise in transistor level CMOS circuit design (PLLs, high-speed IOs,
memories)
?   Experience with silicon debug, wafer probing, FIB, etc
?   Knowledge of flip-chip issues (package, bumping, RDL, debug, etc)
?  Ability to contribute in a team environment under tight schedules

Highly Desirable:
? Hands-on experience with designing high pin-count flip-chips
? Exposure to high-speed speciality IO design
? SoC integration issues, backend flow, custom layout/verification
? Familiarity with Silicon IP libraries, integration of Silicon IP into COT
flow
? Hands-on experience in resolving power, noise issues in ASICs/SoCs
? Proven track record in delivering high-end ASICs with first-pass silicon
success
? Working knowledge of deep sub-micron on-chip routing issues as related to
power, noise, timing
? Working knowledge of on-chip DFT implementation (BIST, Scan, Repair, etc)
? Proficiency in the use of industry standard ASIC CAD tools
(frontend/backend)



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