FreeLists / si-list / [SI-LIST] Re: local and global ground

[Ray Anderson <Raymond.Anderson@xxxxxxx>]

Greg-

I haven't run your spice deck, but by just visually
inspecting your connections I notice that
you have 2 different grounds (gnd, gnd3) defined
in your model while in the real world those
ground locations are actually at 4 physical locations
(input to the first tline, input to the connector,
output from the connector, output of the second tline).
It seems to me that you are forcing some rather strange
conditions by forcing multiple locations to 'gnd' while
referencing the output of the connector to 'gnd3'.

Your 'gnd' grounds are in essence spice node 0. Noise measurements
are made relative to a "local" ground very near to the point of noise
measurement. Measuring things relative to a global ground can
lead to interesting but not real measurements.

I think that you probe statements by default, measure values
relative to node 0 or global ground. You need to arrange things
to measure the noise voltage differentially relative to a local 
ground.

-Ray Anderson
Sun Microsystems

>* connector di/dt simulation
>* two pins from a straight-through header
>* pins are 0.5 x 0.5 mm each at 2.0 mm pitch
>* pin length = 20 mm
>
>
>* vsrc is a ramp function with rounded corners
>
>vsrc src gnd pwl
>+ 0.00000000e-09    0.00000000e+00,
>+ 1.00000000e-09    0.00000000e+00,
>+ 1.00728536e-09    1.04749925e-03,
>+ 1.01230955e-09    2.98950612e-03,
>+ 1.01666498e-09    5.47700003e-03,
>+ 1.02537584e-09    1.26837911e-02,
>+ 1.04279745e-09    3.59374061e-02,
>+ 1.07717645e-09    1.15284845e-01,
>+ 1.11771131e-09    2.61263251e-01,
>+ 1.15862179e-09    4.56881702e-01,
>+ 1.20053422e-09    6.94177032e-01,
>+ 1.24460769e-09    9.66125727e-01,
>+ 1.29132187e-09    1.25672615e+00,
>+ 1.32953060e-09    1.47916722e+00,
>+ 1.34953058e-09    1.58539677e+00,
>+ 1.37969661e-09    1.72766232e+00,
>+ 1.44002855e-09    1.92984247e+00,
>+ 1.48411775e-09    1.99502504e+00,
>+ 1.50000000e-09    2.00000000e+00,
>+ 2.00000000e-08    2.00000000e+00
>
>
>rsrc    src   sig1  50
>
>tline1  sig1  gnd   sig2  gnd   td=2ns  z0=50
>
>xconn   sig2  gnd   sig3  gnd3  conn_2pin
>
>tline2  sig3  gnd3  sig4  gnd   td=2ns  z0=50
>
>rterm   sig4  gnd   50
>
>
>
>*****************
>*  SUBCIRCUITS  *
>*****************
>
>.subckt conn_2pin pin1_in pin2_in pin1_out pin2_out
>
>c12a  pin1_in   pin2_in   0.1pF
>
>l1    pin1_in   pin1_x    15.7nH
>r1    pin1_x    pin1_out  0.01
>
>l2    pin2_in   pin2_x    15.7nH
>r2    pin2_x    pin2_out  0.01
>
>c12b  pin1_out  pin2_out  0.1pF
>
>k12   l1  l2  0.53
>
>.ends
>
>
>******************
>*  RUN CONTROLS  *
>******************
>
>.option post probe csdf
>
>.tran 20ps 10ns
>
>.probe v(src)
>.probe v(sig1) v(sig2) v(sig3) v(sig4)
>.probe v(gnd3)
>
>.end
>

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