Date Index for si-list, 01-2008

[si-list] || [01-2008 Date Index] [01-2008 Thread Index]

[SI-LIST] A question about clock EMC - Han Li
[SI-LIST] Using Current Probes to Measure Cable Resonance - Doug Smith
[SI-LIST] Re: A question about clock EMC - steve weir
[SI-LIST] Re: A question about clock EMC - Kihong Joshua Kim
[SI-LIST] Re: A question about clock EMC - DAVID CUTHBERT
[SI-LIST] Re: [Bulk] A question about clock EMC - Kirby Goulet
[SI-LIST] Re: Definition of "crosstalk loss" ?? - agathon
[SI-LIST] 2.4 GHz antenna - metal case related (non?) issues - Dimiter Popoff
[SI-LIST] Re: 2.4 GHz antenna - metal case related (non?) issues - steve weir
[SI-LIST] Re: 2.4 GHz antenna - metal case related (non?) issues - Dimiter Popoff
[SI-LIST] Re: Draft Touchstone 2.0 document available - Mirmak, Michael
[SI-LIST] SSN Simulation - Mohamad Haghtalab
[SI-LIST] Re: SSN Simulation - steve weir
[SI-LIST] Re: SSN Simulation - Alexandre . AMEDEO
[SI-LIST] Placement of power/ground balls in BGAs - Alaa Alani
[SI-LIST] Re: Placement of power/ground balls in BGAs - steve weir
[SI-LIST] Re: 2.4 GHz antenna - metal case related (non?) issues - DAVID CUTHBERT
[SI-LIST] Re: Placement of power/ground balls in BGAs - DAVID CUTHBERT
[SI-LIST] Re: Placement of power/ground balls in BGAs - steve weir
[SI-LIST] PCB differential auto-routers - Zabinski, Patrick
[SI-LIST] Re: PCB differential auto-routers - Filip, Cristian
[SI-LIST] Re: PCB differential auto-routers - Paul Gingras
[SI-LIST] Re: PCB differential auto-routers - Haller, Robert
[SI-LIST] Power Distribution Strategies - otter30
[SI-LIST] Re: Power Distribution Strategies - steve weir
[SI-LIST] 12th IEEE SPI WORKSHOP - JESA
[SI-LIST] 50 Ohm Via? - Joel Brown
[SI-LIST] Re: 50 Ohm Via? - Joseph Kao
[SI-LIST] Re: 50 Ohm Via? - Harry Selfridge
[SI-LIST] Re: 50 Ohm Via? - wolfgang . maichen
[SI-LIST] Re: 50 Ohm Via? - Tony Luan
[SI-LIST] Re: 50 Ohm Via? - wolfgang . maichen
[SI-LIST] Re: 50 Ohm Via? - Chris Cheng
[SI-LIST] Re: 50 Ohm Via? - Joel Brown
[SI-LIST] Re: 50 Ohm Via? - wolfgang . maichen
[SI-LIST] current flow on a pwr plane - Peterson, James F (EHCOE)
[SI-LIST] Re: 50 Ohm Via? - wolfgang . maichen
[SI-LIST] Re: 50 Ohm Via? - Aubrey_Sparkman
[SI-LIST] Re: current flow on a pwr plane - Kirby Goulet
[SI-LIST] Re: 50 Ohm Via? - Chris Cheng
[SI-LIST] Re: 50 Ohm Via? - Chris Cheng
[SI-LIST] pci bus - david stern
[SI-LIST] Re: 50 Ohm Via? - wolfgang . maichen
[SI-LIST] Re: 50 Ohm Via? - Joel Brown
[SI-LIST] Re: pci bus--> 5V = ancient history - Salkow, Steven
[SI-LIST] Re: 50 Ohm Via? - wolfgang . maichen
[SI-LIST] Re: 50 Ohm Via? - Scott McMorrow
[SI-LIST] Re: [!! SPAM] RES: Re: 50 Ohm Via? - Scott McMorrow
[SI-LIST] Re: Using Current Probes to Measure Cable Resonance - ron@xxxxxxxxxxx
[SI-LIST] Re: Using Current Probes to Measure Cable Resonance - Doug Smith
[SI-LIST] Re: Using Current Probes to Measure Cable Resonance - olaney
[SI-LIST] Re: 50 Ohm Via? - Joel Brown
[SI-LIST] Re: 50 Ohm Via? - Scott McMorrow
[SI-LIST] Re: 50 Ohm Via? - Vinu Arumugham
[SI-LIST] Re: [!! SPAM] Re: Re: 50 Ohm Via? - Scott McMorrow
[SI-LIST] Re: Using Current Probes to Measure Cable Resonance - Doug Smith
[SI-LIST] Re: 50 Ohm Via? - Loyer, Jeff
[SI-LIST] Re: current flow on a pwr plane - DAVID CUTHBERT
[SI-LIST] San Jose EMI Workshop 1/17 - Chris Herrick
[SI-LIST] Re: 50 Ohm Via? - Lars Juul
[SI-LIST] Senior SI System Engineer position at Samtec - Julian Ferry
[SI-LIST] Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. - Ravindra Gali
[SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. - steve weir
[SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. - Tom Dagostino
[SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. - Gustavo Blando
[SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. - Eric Bogatin
[SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. - Loyer, Jeff
[SI-LIST] High Speed data/clk - Jory McKinley
[SI-LIST] AC Termination : Capacitor Value - Joe Paul M
[SI-LIST] Re: AC Termination : Capacitor Value - wolfgang . maichen
[SI-LIST] Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard - liuluping 41830
[SI-LIST] PCB current carrying capacity calculation - qqqwqq
[SI-LIST] Re: PCB current carrying capacity calculation - kuseswar_prasad
[SI-LIST] Re: PCB current carrying capacity calculation - Jack Olson
[SI-LIST] bare die IBIS models - Tate, David
[SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard - Wei Zhou
[SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard - Vinu Arumugham
[SI-LIST] Re: bare die IBIS models - Tom Dagostino
[SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard - liuluping 41830
[SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard - Wei Zhou
[SI-LIST] 回复:Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard - liuluping 41830
[SI-LIST] Hi - navaram kumar
[SI-LIST] Re: Hi - Muranyi, Arpad
[SI-LIST] US & Europe - Applications Engineering Job Opportunity - Dave Kuhn
[SI-LIST] Call for Papers for Mentor Graphics U2U open - Carrier, Patrick
[SI-LIST] High speed USB cable - Bharathkumar Raju
[SI-LIST] Re: High speed USB cable - olaney
[SI-LIST] How to place the AC coupling capacitor of the serdes? - liuluping 41830
[SI-LIST] Re: How to place the AC coupling capacitor of the serdes? - Bahlinger, Martin
[SI-LIST] Re: AC Termination : Capacitor Value - kiran.sadasivan
[SI-LIST] Re: High speed USB cable - Clewell, Craig
[SI-LIST] Re: Hi - Scott McMorrow
[SI-LIST] Re: How to place the AC coupling capacitor of the serdes? - Kotson, Michael
[SI-LIST] Re: How to place the AC coupling capacitor of the serdes? - Bowden, Ivor
[SI-LIST] AC coupling capacitor testpoint - N. Paul Taddonio
[SI-LIST] Re: How to place the AC coupling capacitor of the serdes? - Paul Levin
[SI-LIST] Re: How to place the AC coupling capacitor of the serdes? - Wei Zhou
[SI-LIST] Re: How to place the AC coupling capacitor of the serdes? - liuluping 41830
[SI-LIST] Capacitor in parallel - Kivity Kobi
[SI-LIST] SECOND CALL FOR PAPERS: SPI'08 - Jose Schutt-Aine
[SI-LIST] SECOND CALL FOR PAPERS: SPI'08 - Jose Schutt-Aine
[SI-LIST] 0.9 mil,0.8 mil,0.7mil gold wire application for IC packaging - Lu, Devis
[SI-LIST] Cisco Systems - Sr. Signal Integrity Engineer position - Sadakathullah Mohamed Ali (mohamali)
[SI-LIST] The current distribution and partial self-inductance - Kyoungchoul Koo
[SI-LIST] Re: The current distribution and partial self-inductance - steve weir
[SI-LIST] What is meant by a differential signal - Bharathkumar Raju
[SI-LIST] Re: The current distribution and partial self-inductance - Eric Bogatin
[SI-LIST] Re: si-list Digest V8 #22 - Dennis Han
[SI-LIST] Re: 0.9 mil,0.8 mil,0.7mil gold wire application for IC packaging - Barnes, Heidi
[SI-LIST] Re: What is meant by a differential signal - Mirmak, Michael
[SI-LIST] Re: What is meant by a differential signal - aditya
[SI-LIST] Re: 0.9 mil,0.8 mil,0.7mil gold wire application for IC packaging - aditya
[SI-LIST] Meet your fellow SI-listers face to face at DesignCon! - Jim Nadolny
[SI-LIST] MPC8630E Freescale Oscillator - Edi Fraiman
[SI-LIST] Symposium on Signal Integrity - Clewell, Craig
[SI-LIST] 帳號被盜用!! - f83118
[SI-LIST] European IBIS Summit at DATe 2008 - First Call for Call for Paticipation - Ralf Brüning
[SI-LIST] internal timestep too small in transient analysis HSPICE - Shaohua Li
[SI-LIST] Please ignore - Surita Chandani
[SI-LIST] Re: MPC8630E Freescale Oscillator - Eddy
[SI-LIST] Re: internal timestep too small in transient analysis HSPICE - Andrew Ingraham
[SI-LIST] internal timestep too small in transient analysis - Joel Amzallag
[SI-LIST] E-ATX Form Factor - M.RanjithKumar
[SI-LIST] Update: Free Spice post-processing environment - nelson.seiden
[SI-LIST] Update: Free Spice post-processing environment - nelson.seiden
[SI-LIST] Power Integrity Modeling and Design Seminar on 2/08/08, 1-4pm @ Sun, Menlo Park Bldg 12 - Derek Tsai
[SI-LIST] Re: High speed USB cable - Grasso, Charles
[SI-LIST] CLASS IS FULL: Power Integrity Modeling and Design Seminar on 2/08/08, 1-4pm @ Sun, Menlo Park Bldg 12 - Denise O'Dell
[SI-LIST] EMC simulation - Mohamad Haghtalab
[SI-LIST] Book on Vector Network Analyzers - Pommerenke, David
[SI-LIST] SPI'08 : last week to submit your paper - Jose Schutt-Aine
[SI-LIST] Agenda, IBIS Summit at DesignCon 2008 on Feb. 7 - Mirmak, Michael