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[SI-LIST] Re: Hyperlynx vs. Signal Explorer

  • From: "Chris Cheng" <Chris.Cheng@xxxxxxxxxxxx>
  • To: "si-list" <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 10 Jan 2007 20:58:39 -0800
You can sweep and analyze your channel with C++ or Matlab till Kingdom =
come, nothing will point you to your receiver having an impedance =
mismatch problem without the circuit model.
And that's exactly what a lot of silicon vendors goofed on.=20

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of agathon
Sent: Wednesday, January 10, 2007 6:11 PM
To: si-list
Subject: [SI-LIST] Re: Hyperlynx vs. Signal Explorer


Even more interesting:  I don't think the behavioral/macro models are
designed for replacing spice sims.
They augment it for components or calculations that spice/etcetera don't
have, in order to fully sweep/analyze the channel.

On 1/10/07, Chris Cheng <Chris.Cheng@xxxxxxxxxxxx> wrote:
>
> It is even more interesting that the majority of serial link problems =
I =3D
> found is the silicon vendor forgot to account for the receiving pad =
=3D
> capacitance resulting in excessive ISI due to reflections. Something =
no =3D
> Matlab or C++ can predict but a simple SPICE simulation will pick up =
in =3D
> the first run.
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Dean Gonzales
> Sent: Wednesday, January 10, 2007 3:09 PM
> To: weston.beal@xxxxxxxxx; si-list
> Subject: [SI-LIST] Re: Hyperlynx vs. Signal Explorer
>
>
>
> Interestingly enough, it seems that with the advent of the newer/more
> complex 5Gb+ high-speed serial links, there is a trend where many
> silicon vendors are choosing to roll-their-own channel simulation =
tools;
> many times consisting of either Matlab or C++, or a mix of both. I =
guess
> this ties into knowing what the job is that needs doing.=3D3D20
>
> Regards,
> Dean Gonzales
> Broadcom's Server & Storage Chipset Group
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx =
[mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Beal, Weston
> Sent: Wednesday, January 10, 2007 2:31 PM
> To: si-list
> Subject: [SI-LIST] Re: Hyperlynx vs. Signal Explorer
>
>
> This discussion comes up at least once a year and the answer is still
> the same. The best description I've seen was a couple of years ago. =
All
> EDA tools suck if you use them long enough. The deeper you get into =
it,
> the more bugs you find. Don't go too deep into it and you'll be happy =
in
> your ignorance :)X=3D3D3D20
>
> Now, the useful answer is that you need to look at features beyond
> functions. Every SI simulator simulates digital nets to some useful
> accuracy. Does it interface well to your PCB layout tool? Do you need =
it
> to? Does it output results in the way you want to use it? Does it
> support models of the effects that you are concerned with? Does it =
have
> the post-processing (waveform measurement) that you need? Is the cost
> within your budget? Can you, and do you want to, automate the tool for
> your work flow?
>
> So before you go looking too far for the right tool, you should figure
> out what is the job you need to do. If you just want to simulate a net
> once in a while to show pretty waveforms to your manager then get the
> cheapest tool you can find that makes pretty waveforms and you both =
will
> be happy for the immediate future. If you want a fully extensible,
> highly accurate, feature rich SI tool then get ready to spend some big
> money and time to get it set up in your environment. Thereafter you =
will
> find long-term joy. Most users want something in between. That's why
> there are so many SI tools on the market. Decide what is important to
> you and then the choice of tool will be fairly obvious.
>
> Regards,
> Weston
>
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx =
[mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of agathon
> Sent: Wednesday, January 10, 2007 12:41 PM
> To: si-list
> Subject: [SI-LIST] Re: Hyperlynx vs Signal Explorer
>
> I recently received a comment about just this from an acquaintance:
> ----
> "Short answer:  anyone trying to make full use of Cadence pcb si tools
> for interconnect sim and who, nevertheless, recommends it could make
> good use of counseling of some kind... or the receivers of that info
> could make good use
> of a polygraph test on the one recommending.   All this based on 1st
> hand
> experience over time."
>
> ----
> No info on Hyperlynx.
>
>
>
> On 1/9/07, cdomeny <craig.domeny@xxxxxxxx> wrote:
> >
> > We are considering adding a base-model (<GHz) SI tool to our PCB
> design
> > flow and have looked at Mentor Hyperlynx EXT and Cadence Orcad =3D
> Sig=3D3D20
> > Explorer. In research, it seems the Cadence tool does not =3D
> actually=3D3D20
> > perform "physical extraction", but is able to do a post-layout
> analysis
> > somehow. Can anyone help?
> >
> > Hyperlynx "seems" more mature, but cost ~2X. However, we are =
concerned
>
> > also about post-layout, and if Hyperlynx actually extracts the =
layout,
>
> > it seems like a more robust method.
> >
> > Any help, insight, or guidance is appreciated.
> >
> > Thanks, - Craig
> >
> > ------------------------------------------------------------------
> >
> >
>
>
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