FreeLists / si-list / [SI-LIST] Re: PCB layer stackup

["Symon" <symon_brewer@xxxxxxxxxxx>]

Hi Stuart,
To the best of my knowledge, and IME, I think you're mistaken. As long as 
the cores and prepregs etc. are symetrical there won't be a warpage problem. 
The copper planes per se don't matter. The designer can even use copper 
balancing if they're paranoid!
HTH, Syms.

----- Original Message ----- 
From: "Stuart Brorson" <sdb@xxxxxxxxxx>


> Forgetting about any minor SI advantages/disadvantages, stackup 1 has
> the major disadvantage that the plane layers are unbalanced, which can
> lead to board warpage.  That is, the planes will strain the top
> layers of stackup 1 more than the non-plane bottom layers, which can
> lead to bent, warped boards.  The problem would become acute over wide
> temperature ranges.  I'd stick with stackup 2.
>
> Stuart
>
>> I need to specify a 8layer board. Fastest edges on the board are on the
>> 600Mbit LVDS channels : about 500ps. I have two stackups in mind :
>>
>>                  stackup 1              stackup 2
>> ---------------------------------------------------------
>> L1                routing                routing
>> Substrate
>> L2                power plane            GND
>> Substrate
>> L3                power plane            routing
>> Substrate
>> L4                GND                    power plane
>> Substrate
>> L5                routing                power plane
>> Substrate
>> L6                routing                routing
>> Substrate
>> L7                GND                    GND
>> Substrate
>> L8                routing                routing
>>> 

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