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[SI-LIST] Re: FW: IBIS modelling in PSpice
- From: "Muranyi, Arpad" <arpad.muranyi@xxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 5 Jan 2006 08:34:05 -0800
Chris,
I think the article you are referring to is the opposite of
what Nikhil was asking for. The article explains how to make
an IBIS file from a transistor level buffer model in PSPICE.
I think he was asking how to take an IBIS model and simulate
with that in PSPICE.
Arpad
------------------------------------------------------------
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On Behalf Of Chris Schmolze
Sent: Thursday, January 05, 2006 5:50 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] FW: IBIS modelling in PSpice
=3D20
Nikhil,
=3D20
The PSpice equivalent to the Berkeley standard B-element is the EVALUE
voltage-controlled voltage source and GVALUE voltage-controlled current
source.=3D20
The EVALUE and GVALUE parts are located in the ABM library and are
documented in the PSpice Reference Guide.
If you'd like to use PSpice to create IBIS models here is a link to an
app. note "Creating IBIS Models using PSpice and Allegro PCB SI Model
Integrity". The app. note come with a kit or sample PSpice project.
http://www.cadence.com/community/allegro/pcb_si/tr.aspx?type=3D3DModeling=
&s=3D
o
rt=3D3D&abs=3D3D&exclude=3D3D
R- Chris Schmolze
Cadence
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of nrpatel@xxxxxxxxxxx
Sent: Tuesday, January 03, 2006 3:56 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] IBIS modelling in PSpice
Hello,
Is there a way to model IBIS in PSpice? If so can anyone show me how?
I am not looking for an exact representation. A behavioral model would
be just as fine.
Thanks
Nikhil=3D20
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