FreeLists / si-list / [SI-LIST] Re: SI/Timing tool survey

["Peterson, James F (FL51)" <james.f.peterson@xxxxxxxxxxxxx>]

Todd,

for system level timing analysis we have had good results from just using an
Excel spreadsheet approach. We commit a page to component delays, a page for
trace delays, and a page for each interface that has a timing analysis -
these interface pages all reference the trace delay and device delay pages.
if a device delay or trace delay changes, it is updated at only one place,
which then ripples into all the analysis. the analysis pages have a header
that describes the interface (e.g. "memory data bus"), a description of the
setup and hold timing equations, then the actual numbers. we put some
"fluff" in it also (summary page, links to analysis, flags for negative
results or problems).

we find this approach very intuitive, straightforward, and easy to create
and maintain.  we can create a board level timing model in an excel
spreadsheet in less than 2 weeks. I haven't seen a board level timing tool
that's as simple and effective.

Drawbacks : this approach only tracks/compiles timing, it needs other tools
to actually provide the timing (static timing analyzers, data sheets, SI
tools). It becomes cumbersome when trying to analyze every bit in a 64 bit
bus as opposed to just taking the worst case numbers of the whole bus
(something that might be needed if there is a timing problem and you're
counting ps).

Jim 

-----Original Message-----
From: Todd Westerhoff [mailto:twesterh@xxxxxxxxx]
Sent: Wednesday, January 08, 2003 10:44 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] SI/Timing tool survey



Hi all - Happy New Year!

I'm looking at static timing analysis and IBIS/Spice modeling tools (again)
and wanted to make sure I didn't miss any.

Replies on or off-list are greatly appreciated.

For static timing analysis - I'm interested in system-level, as opposed to
ASIC-only analysis tools.  My impression is that there are only a few of
them, which is a shame.

For SI modeling tools - I'm looking for tools that help the user
develop/validate IBIS and/or Spice models.  I think there are a fair number
of tools here, with greatly varying degrees of functionality.

Your experiences and opinions are also greatly appreciated, although we
should probably keep the opinions part private.

Thanks,

Todd.

Todd Westerhoff
High Speed Design Specialist
Cisco Systems
1414 Massachusetts Ave - Boxboro, MA - 01719
email:twesterh@xxxxxxxxx
ph: 978-936-2149
============================================

"When did the choices get so hard, with so much more at stake?
 Life gets mighty precious when there's less of it to waste"

- Bonnie Raitt, "Nick of Time"


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages 
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu
  
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages 
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu