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[SI-LIST] problem about resistor on chip

  • From: Bi Han <mike_bihan@xxxxxxxxxxxx>
  • To: List` Si <si-list@xxxxxxxxxxxxx>
  • Date: Thu, 2 Jan 2003 23:15:04 +0800 (CST)
In recent research or application, a lot of RF works had been done in CMOS 
Logic process.

It is really cool to enjoy the low cost of fabrication. However, some obstacles 
seemed to be 
unable to overcome.

1.  how to fab accurate 50 ohm matching resistor in amplifier ?
 Since every RF system had to be matched to each other, the accurate resistor 
will be 
necessary. Also, the resistor load of the amplifier, such as limiting 
amplifier, will have to be 
accurate to obtain stable DC operation point.
 But the process tolerance is too large.( >15% )  How to resolve this problem ?
 My personal idea will be use multi-parallel resistors to reduce the interface 
resistor and make the ultimate resistor value more controllable.

2.  when there is no 'clean' ground in the circuit, how can we improve it?
 My personal idea will be add more substrate tap to make the voltage potential 
on the whole chip to be closer. However, this will inject more noise into the 
substrate, does any people
had better idea?

best regards.

Bi Han



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