Posts for si-list, 12-2008
Browse: Last Month: 11-2008 Main Archive Page Next Month: 01-2009
- » [SI-LIST] Re: mode conversion myth - Yuriy Shlepnev
- » [SI-LIST] Re: Troubleshooting Technique for System Cables for high frequency noise (such as ESD) - Doug Smith
- » [SI-LIST] Re: Troubleshooting Technique for System Cables for high frequency noise (such as ESD) - Paul Levin
- » [SI-LIST] Troubleshooting Technique for System Cables for high frequency noise (such as ESD) - Doug Smith
- » [SI-LIST] Re: ground planes at top / bottom layer - olaney
- » [SI-LIST] Re: mode conversion myth - istvan Novak
- » [SI-LIST] mode conversion myth - eric bogatin
- » [SI-LIST] ground planes at top / bottom layer - bernd schuster
- » [SI-LIST] Re: Some food for thought - Ihsan Erdin
- » [SI-LIST] Solder mask - Umamaheswar U-TLS,Chennai
- » [SI-LIST] Re: Some food for thought - Muranyi, Arpad
- » [SI-LIST] Re: Some food for thought - Paul Levin
- » [SI-LIST] Some food for thought - Muranyi, Arpad
- » [SI-LIST] 答复: Bulk capacitor decoupling - Zhangkun
- » [SI-LIST] Re: Return current at board transitions - steve weir
- » [SI-LIST] Re: Return current at board transitions - Joel Brown
- » [SI-LIST] Re: Return current at board transitions - steve weir
- » [SI-LIST] Return current at board transitions - Joel Brown
- » [SI-LIST] Re: Bulk capacitor decoupling - Istvan Novak
- » [SI-LIST] Re: Bulk capacitor decoupling - steve weir
- » [SI-LIST] Bulk capacitor decoupling - Offir Assayag
- » [SI-LIST] Re: Effect of Via - Scooby Doo
- » [SI-LIST] Re: Effect of Via - sunil bharadwaz
- » [SI-LIST] Re: What will happen when short the SERDES IO to GND? - Ward, Richard
- » [SI-LIST] Re: Effect of Via - Istvan Novak
- » [SI-LIST] Effect of Via - sunil bharadwaz
- » [SI-LIST] Re: What will happen when short the SERDES IO to GND? - Neo
- » [SI-LIST] Re: What will happen when short the SERDES IO to GND? - Ward, Richard
- » [SI-LIST] Re: What will happen when short the SERDES IO to GND? - Neo
- » [SI-LIST] Re: Can SSN be restrained by board decaps? - Neo
- » [SI-LIST] Re: PCIe failure due to too fast of an edge? - Neo
- » [SI-LIST] Re: DDR2 or DDR3 - Martin Euredjian
- » [SI-LIST] Re: DDR2 or DDR3 - James Bell
- » [SI-LIST] DDR2 or DDR3 - Martin Euredjian
- » [SI-LIST] Re: Time_to_VM on a clock forwarded interface? - David Banas
- » [SI-LIST] Re: Time_to_VM on a clock forwarded interface? - Beal, Weston
- » [SI-LIST] Time_to_VM on a clock forwarded interface? - Todd DeRego
- » [SI-LIST] Driver impedance, slew rate, loading and signal integrity - Neo
- » [SI-LIST] Re: Spectre S-parameter based PDN simulations - Vadim Heyfitch
- » [SI-LIST] Re: Spectre S-parameter based PDN simulations - Beal, Weston
- » [SI-LIST] Spectre S-parameter based PDN simulations - Suresh Subramaniam
- » [SI-LIST] Re: Invitation to connect on LinkedIn - colin_warwick
- » [SI-LIST] Re: Invitation to connect on LinkedIn - colin_warwick
- » [SI-LIST] Re: Invitation to connect on LinkedIn - Tom Biggs
- » [SI-LIST] Invitation to connect on LinkedIn - Kihong Kim
- » [SI-LIST] 回复:Re: Differential TDR - liusong5301
- » [SI-LIST] Re: Designing PCB Stackups - Bill Stube
- » [SI-LIST] Re: Differential TDR - Istvan Novak
- » [SI-LIST] Re: Differential TDR - ZHENGGANG CHENG
- » [SI-LIST] Re: Differential TDR - Istvan Novak
- » [SI-LIST] Re: Differential TDR - Yuriy Shlepnev
- » [SI-LIST] Isolation between +3.3V & +3.3V AUX supplies (section 3.2.5 of ExpressCard Standard) - Bharathkumar Raju
- » [SI-LIST] Re: Differential TDR - olaney
- » [SI-LIST] Re: Differential TDR - ZHENGGANG CHENG
- » [SI-LIST] Re: Differential TDR - Istvan Novak
- » [SI-LIST] Re: Differential TDR - olaney
- » [SI-LIST] Differential TDR - ZHENGGANG CHENG
- » [SI-LIST] Happy Thirteenth Birthday IBIS! - colin_warwick
- » [SI-LIST] TVS on a USB line - David Lieby
- » [SI-LIST] Forum for Sharing HFSS Projects, etc. - admin@xxxxxxxxxxxxxx
- » [SI-LIST] Re: Designing PCB Stackups - V S
- » [SI-LIST] Re: Designing PCB Stackups - Eric Goodill
- » [SI-LIST] Re: Designing PCB Stackups - Lee Ritchey
- » [SI-LIST] Re: Designing PCB Stackups - Lee Ritchey
- » [SI-LIST] Re: Designing PCB Stackups - DAVID CUTHBERT
- » [SI-LIST] Re: Designing PCB Stackups - Istvan Nagy
- » [SI-LIST] Re: Designing PCB Stackups - Ken Cantrell
- » [SI-LIST] European time zone reprise of free webcast "Back to Basics: Measurement-Based Channel Modeling for Signal Integrity using Agilent ADS" Feb 15th 2009 - colin_warwick
- » [SI-LIST] Re: Designing PCB Stackups - istvan Novak
- » [SI-LIST] Re: Designing PCB Stackups - steve weir
- » [SI-LIST] Designing PCB Stackups - codymiller
- » [SI-LIST] BNC/SMA protectors - Doug Smith
- » [SI-LIST] Re: why 13.56 MHz for NFC - Gary Morrell
- » [SI-LIST] Re: Reset problem with power supply - Kevin G. Rhoads
- » [SI-LIST] Re: Fw: Re: Re: Reset problem with power supply - Richard Jungert
- » [SI-LIST] Re: why 13.56 MHz for NFC - Sumathi Kuppuswamy
- » [SI-LIST] Fw: Re: Re: Reset problem with power supply - olaney
- » [SI-LIST] Re: Reset problem with power supply - Eddy
- » [SI-LIST] JEDEC DDR3 SODIMM trace length rules - Istvan Nagy
- » [SI-LIST] Re: Reset problem with power supply - steve weir
- » [SI-LIST] Re: Reset problem with power supply - Hal Murray
- » [SI-LIST] Re: Reset problem with power supply - Hal Murray
- » [SI-LIST] Re: Reset problem with power supply - Manickavelu M .
- » [SI-LIST] Re: Reset problem with power supply - V S
- » [SI-LIST] Re: Reset problem with power supply - V S
- » [SI-LIST] Re: Reset problem with power supply - Jerry Martinson
- » [SI-LIST] Re: Reset problem with power supply - steve weir
- » [SI-LIST] Re: Reset problem with power supply - olaney
- » [SI-LIST] Re: Reset problem with power supply - Istvan Nagy
- » [SI-LIST] Re: Reset problem with power supply - Hal Murray
- » [SI-LIST] Re: IBIS warning - Lynne D. Green
- » [SI-LIST] even/odd/common/differential - olaney
- » [SI-LIST] Re: Reset problem with power supply - Ron Lewerenz
- » [SI-LIST] Re: Reset problem with power supply - olaney
- » [SI-LIST] Re: Reset problem with power supply - steve weir
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - steve weir
- » [SI-LIST] Re: How to do termination in differential signal with series termination ? - Yuriy Shlepnev
- » [SI-LIST] Reset problem with power supply - V S
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - Tom Dagostino
- » [SI-LIST] Re: why 13.56 MHz for NFC - Andrew Ingraham
- » [SI-LIST] Re: why 13.56 MHz for NFC - olaney
- » [SI-LIST] Re: How to do termination in differential signal with series termination ? - Beal, Weston
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - King Da
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - Istvan Novak
- » [SI-LIST] why 13.56 MHz for NFC - Sumathi Kuppuswamy
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - steve weir
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - DAVID CUTHBERT
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - Santos Fernandez, Jesus
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - steve weir
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - Kiran Kumar Kalsani Narsaiah, TLS,Chennai
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - steve weir
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - olaney
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - King Da
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - steve weir
- » [SI-LIST] Re: [Help] How to do termination in differential signal with series termination ? - DAVID CUTHBERT
- » [SI-LIST] [Help] How to do termination in differential signal with series termination ? - King Da
- » [SI-LIST] Re: Fun, quick poll: What social media web sites do you use? - colin_warwick
- » [SI-LIST] Re: IV and VT mismatch - Tom Dagostino
- » [SI-LIST] IV and VT mismatch - Jason Fang
- » [SI-LIST] Re: I/O power integrity - Peterson, James F (EHCOE)
- » [SI-LIST] SAS 2.0 TCTF test load. - John Lin