Posts for si-list, 05-2010

Browse: Last Month: 04-2010 Main Archive Page Next Month: 06-2010

» [SI-LIST] Temporary Sr. Power Integrity Engineer position continues to be available at Mayo Clinic - Buchs, Kevin
» [SI-LIST] Re: IBIS min, typ and max. values - Lance Wang
» [SI-LIST] Re: Looking for an algorithm to clip waveforms - Vishwanath Elechithaya
» [SI-LIST] Re: Looking for an algorithm to clip waveforms - Vishwanath Elechithaya
» [SI-LIST] Looking for an algorithm to clip waveforms - Vishwanath Elechithaya
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: IBIS min, typ and max. values - Lance Wang
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: IBIS min, typ and max. values - Lance Wang
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: IBIS min, typ and max. values - Lance Wang
» [SI-LIST] Re: IBIS min, typ and max. values - Mike LaBonte (milabont)
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: IBIS min, typ and max. values - Lance Wang
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: IBIS min, typ and max. values - Powell, Jon N
» [SI-LIST] Re: IBIS min, typ and max. values - Lance Wang
» [SI-LIST] Re: ddr3 vref margin test - Mustafa Özgür TUTUM
» [SI-LIST] Re: ddr3 vref margin test - Hermann Ruckerbauer
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] ddr3 vref margin test - Mustafa Özgür TUTUM
» [SI-LIST] Re: IBIS min, typ and max. values - Sudhanshu SINGH
» [SI-LIST] Top 10 postings on my blog - colin_warwick
» [SI-LIST] Re: IBIS min, typ and max. values - Hermann Ruckerbauer
» [SI-LIST] Re: IBIS min, typ and max. values - Muranyi, Arpad
» [SI-LIST] Re: SI applications engineer opening in San Jose, CA - Jackie
» [SI-LIST] Re: IBIS min, typ and max. values - Hermann Ruckerbauer
» [SI-LIST] Re: IBIS min, typ and max. values - Sudhanshu SINGH
» [SI-LIST] Free Agilent webcast, live June 15th 2010: "Which EM Solver Should I Use?" - colin_warwick
» [SI-LIST] Re: si-list birthday in the news - Oprea, Dorin (Dorin)
» [SI-LIST] Re: IBIS min, typ and max. values - Hermann Ruckerbauer
» [SI-LIST] University of Oxford: High-Speed Digital Design Month - Bridges, Evelyn
» [SI-LIST] Re: si-list birthday in the news - Colin Warwick
» [SI-LIST] Re: IBIS min, typ and max. values - Lynne D. Green
» [SI-LIST] Re: IBIS min, typ and max. values - Tom Dagostino
» [SI-LIST] Re: IBIS min, typ and max. values - steve weir
» [SI-LIST] IBIS min, typ and max. values - Hermann Ruckerbauer
» [SI-LIST] SI opening at NetLogic Microsystems - Margaret Wang
» [SI-LIST] FCC related stuff - sunil bharadwaz
» [SI-LIST] Re: [SI-LIST]: VGA to HDMI Converter - Sumathi Kuppuswamy
» [SI-LIST] Re: [SI-LIST]: VGA to HDMI Converter - keithK EPD
» [SI-LIST] Re: [SI-LIST]: VGA to HDMI Converter - Istvan Nagy
» [SI-LIST] [SI-LIST]: VGA to HDMI Converter - Sumathi Kuppuswamy
» [SI-LIST] Re: si-list birthday in the news - Jack Stone
» [SI-LIST] Packaging SI Intern position opening at National Semiconductor - Gumaste, Vijaylaxmi
» [SI-LIST] Re: si-list birthday in the news - Ken Cantrell
» [SI-LIST] Re: si-list birthday in the news - Istvan Novak
» [SI-LIST] Re: si-list birthday in the news - Jory McKinley
» [SI-LIST] Re: si-list birthday in the news - Inmyoung Song
» [SI-LIST] Re: si-list birthday in the news - steve weir
» [SI-LIST] Re: si-list birthday in the news - Chris Mulvey
» [SI-LIST] Re: si-list birthday in the news - Mohsen Mardi
» [SI-LIST] Re: si-list birthday in the news - Doug Brooks
» [SI-LIST] Re: si-list birthday in the news - Chris Cheng
» [SI-LIST] Re: si-list birthday in the news - Muranyi, Arpad
» [SI-LIST] flags - Erich Selna
» [SI-LIST] commands - Erich Selna
» [SI-LIST] Re: si-list birthday in the news - Ambrish Varma
» [SI-LIST] Re: si-list birthday in the news - Zabinski, Patrick
» [SI-LIST] Re: si-list birthday in the news - Erich Selna
» [SI-LIST] Re: si-list birthday in the news - Erich Selna
» [SI-LIST] Re: si-list birthday in the news - Muranyi, Arpad
» [SI-LIST] Re: si-list birthday in the news - Beal, Weston
» [SI-LIST] Re: si-list birthday in the news - Jim (James) Antonellis
» [SI-LIST] Re: si-list birthday in the news - Frances_Hart
» [SI-LIST] Re: si-list birthday in the news - Ray Anderson
» [SI-LIST] si-list birthday in the news - Ray Anderson
» [SI-LIST] Re: .brd to .dxf/.gds/.gbr - J_Dong
» [SI-LIST] Re: .brd to .dxf/.gds/.gbr - steve weir
» [SI-LIST] AW: .brd to .dxf/.gds/.gbr - Havermann, Gert
» [SI-LIST] .brd to .dxf/.gds/.gbr - Jennifer Maharani
» [SI-LIST] FPGA Camp Bangalore is tomorrow - Vikram Singh
» [SI-LIST] IBIS Summit Third Call of Papers and Participations - DAC June15th, 2010, Anaheim CA - Lance Wang
» [SI-LIST] ANSYS High Performance Seminar Series - Isaac Waldron
» [SI-LIST] Re: How to extract multi-port S parameter in spice ? - rongsheng_yuan
» [SI-LIST] How to extract multi-port S parameter in spice ? - Lijun
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Istvan Novak
» [SI-LIST] Re: JEDEC Complaince tests - sudarshan kr
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Yuriy Shlepnev
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Chris Cheng
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Istvan Novak
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Chris Cheng
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Yuriy Shlepnev
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - steve weir
» [SI-LIST] Re: AC series capacitor position inhighspeeddifferential signals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in highspeeddifferential signals - Istvan Novak
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - earl albin
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in highspeeddifferential signals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speeddifferentialsignals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Stephen Zinck
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Istvan Novak
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Colin Warwick
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Curt McNamara
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Neo
» [SI-LIST] Re: Skew matching for SATA 3G signals - Ravinder . Ajmani
» [SI-LIST] Skew matching for SATA 3G signals - Grasso, Charles
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Yuriy Shlepnev
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Grasso, Charles
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Kevin G. Rhoads
» [SI-LIST] Re: Multilane SERDES Current - steve weir
» [SI-LIST] Re: Multilane SERDES Current - Chris Adam
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Istvan Novak
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Richard Feldman
» [SI-LIST] Re: 10 Layer PCB Stack-up - steve weir
» [SI-LIST] Re: 10 Layer PCB Stack-up - Moody, Emory
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Neo
» [SI-LIST] Re: 10 Layer PCB Stack-up - steve weir
» [SI-LIST] Re: 10 Layer PCB Stack-up - wolfgang . maichen
» [SI-LIST] 10 Layer PCB Stack-up - Jaison Fernandez
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - colin_warwick
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Scott McMorrow
» [SI-LIST] Re: AC series capacitor position in high speeddifferentialsignals - steve weir
» [SI-LIST] Re: AC series capacitor position in high speeddifferentialsignals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - steve weir
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Peterson, James F (EHCOE)
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - steve weir
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - Tom Dagostino
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Muranyi, Arpad
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - steve weir
» [SI-LIST] Re: AC series capacitor position in high speeddifferentialsignals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - kevin . voegele
» [SI-LIST] Re: AC series capacitor position in high speeddifferential signals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speed differentialsignals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - Powell, Jon N
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Jim Nadolny
» [SI-LIST] Re: Undershoot/Overshoot Violations - steve weir
» [SI-LIST] Re: Undershoot/Overshoot Violations - Conrad Herse
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - steve weir
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - Istvan Novak
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - V S
» [SI-LIST] TEST - 黎睿
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - Stephen Zinck
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - Istvan Novak
» [SI-LIST] Re: Multilane SERDES Current - steve weir
» [SI-LIST] Multilane SERDES Current - Chris Adam
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Neo
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Neo
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Jim Nadolny
» [SI-LIST] Re: AW: Maximum trace length of 6.25Gbps SerDes - wolfgang . maichen
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - Lee Ritchey
» [SI-LIST] Re: AC series capacitor position in high speed differential signals - steve weir
» [SI-LIST] AC series capacitor position in high speed differential signals - fei xue
» [SI-LIST] Re: DDR3 Reset line - Hermann Ruckerbauer
» [SI-LIST] Re: AW: Maximum trace length of 6.25Gbps SerDes - Mashook Ahamed Usman
» [SI-LIST] DDR3 Reset line - Lee Isaac
» [SI-LIST] AW: Maximum trace length of 6.25Gbps SerDes - Havermann, Gert
» [SI-LIST] Re: Maximum trace length of 6.25Gbps SerDes - Heyfitch
» [SI-LIST] Re: Maximum trace length of 6.25Gbps SerDes - Istvan Novak
» [SI-LIST] Re: Maximum trace length of 6.25Gbps SerDes - steve weir
» [SI-LIST] Re: Undershoot/Overshoot Violations - Inmyoung Song
» [SI-LIST] Re: Undershoot/Overshoot Violations - Doug Burns
» [SI-LIST] Undershoot/Overshoot Violations - Conrad Herse
» [SI-LIST] Re: trace impedance difference in same signal group of Intel guide - Moran, Brian P
» [SI-LIST] Re: HDMI Cable - qantrix
» [SI-LIST] 回复： Re: trace impedance difference in same signal group of Intel guide - fei xue
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - steve weir
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Neo
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Kenneth W. Egan
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - Xu, Catherine (ICS)
» [SI-LIST] Re: Why shielded twisted-pair is still twisted? - steve weir
» [SI-LIST] Why shielded twisted-pair is still twisted? - Neo
» [SI-LIST] Re: HDMI Cable - Scott McMorrow
» [SI-LIST] Re: HDMI Cable - Kenneth W. Egan
» [SI-LIST] HDMI Cable - Neo
» [SI-LIST] Looking for a layout engineer in San Jose - Ravinder . Ajmani
» [SI-LIST] Re: trace impedance difference in same signal group of Intel guide - Moran, Brian P
» [SI-LIST] Re: trace impedance difference in same signal group of Intel guide - Maoxin Yin
» [SI-LIST] Re: CHGND connection in DVI connector - qantrix
» [SI-LIST] Just Joined - baqar
» [SI-LIST] Re: ??: Re: trace impedance difference in same signal group of Intel guide - Loyer, Jeff
» [SI-LIST] Re: 回复： Re: trace impedance difference in same signal group of Intel guide - Grasso, Charles
» [SI-LIST] Re: ??: Re: trace impedance difference in same signal group of Intel guide - Ken Cantrell
» [SI-LIST] Re: CHGND connection in DVI connector - steve weir
» [SI-LIST] Re: CHGND connection in DVI connector - qantrix
» [SI-LIST] Re: 回复： Re: trace impedance difference in same signal group of Intel guide - Hermann Ruckerbauer
» [SI-LIST] Re: 回复： Re: trace impedance difference in same signal group of Intel guide - Heyfitch
» [SI-LIST] 回复： Re: trace impedance difference in same signal group of Intel guide - fei xue
» [SI-LIST] Re: Ibis model Request! - Piyush Bhatt
» [SI-LIST] Re: trace impedance difference in same signal group of Intel guide - Powell, Jon N
» [SI-LIST] Re: trace impedance difference in same signal group of Intel guide - Aubrey Sparkman
» [SI-LIST] Re: JEDEC Complaince tests - Michael Greim
» [SI-LIST] Re: CHGND connection in DVI connector - Grasso, Charles
» [SI-LIST] Re: trace impedance difference in same signal group of Intel guide - Grasso, Charles
» [SI-LIST] Re: JEDEC Complaince tests - steve weir
» [SI-LIST] JEDEC Complaince tests - sudarshan kr
» [SI-LIST] Re: trace impedance difference in same signal group of Intel guide - Ken Cantrell
» [SI-LIST] About thermal control in semiconductor - Moore Mo (Mo Daochun)
» [SI-LIST] Re: R: trace impedance difference in same signal group of Intel guide - Hermann Ruckerbauer
» [SI-LIST] R: trace impedance difference in same signal group of Intel guide - gianguida
» [SI-LIST] trace impedance difference in same signal group of Intel guide - fei xue
» [SI-LIST] AW: specification download - Havermann, Gert
» [SI-LIST] specification download - jun li
» [SI-LIST] Re: How to connect Chassis ground to DGND - Grasso, Charles
» [SI-LIST] European IBIS Summit Meeting Agenda - May 12, 2010 - Bob Ross
» [SI-LIST] Re: Reflection Vs Crosstalk Equalization - Heck, Howard
» [SI-LIST] How to connect Chassis ground to DGND - qantrix
» [SI-LIST] Re: CHGND connection in DVI connector - Kenneth W. Egan
» [SI-LIST] Re: CHGND connection in DVI connector - steve weir
» [SI-LIST] Re: CHGND connection in DVI connector - qantrix
» [SI-LIST] IBIS Summit Second Call of Papers - DAC June15th, 2010, Anaheim CA - Lance Wang
» [SI-LIST] Re: CHGND connection in DVI connector - steve weir
» [SI-LIST] Re: CHGND connection in DVI connector - qantrix
» [SI-LIST] Re: CHGND connection in DVI connector - steve weir
» [SI-LIST] CHGND connection in DVI connector - qantrix
» [SI-LIST] Re: Reflection Vs Crosstalk Equalization - Lakshmi N. Sundararajan - PTU
» [SI-LIST] Reflection Vs Crosstalk Equalization - Ria R
» [SI-LIST] GB-Ethernet parallelism rules - Hirshtal Itzhak