Posts for si-list, 04-2012

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  1. » [SI-LIST] Call for Papers : Special session on "Signal Integrity and Power Integrity" at the 32nd PIERS in Moscow, Russia, Nitin Kumar CHHABRA
  2. » [SI-LIST] Re: Opportunity - Application Engineer - Signal Integrity, venkataraos
  3. » [SI-LIST] Philosophical Question about SERDES Analyses, edward kowal
  4. » [SI-LIST] to what extent recovered clock depends on the serdes ref clock, prasad
  5. » [SI-LIST] Re: PCB Material clarifications, wangsuhua
  6. » [SI-LIST] Shive wave machine video, colin_warwick
  7. » [SI-LIST] Re: Shive wave machine video, colin_warwick
  8. » [SI-LIST] Engineering services at Broadpak, Elias Lozano
  9. » [SI-LIST] characteristic impedance at DC, mohammad haaeri
  10. » [SI-LIST] Re: Engineering services at Broadpak, Hal Murray
  11. » [SI-LIST] Package Model in IBIS file, Nijagunamurthy, Hithesh (GE Intelligent Platforms)
  12. » [SI-LIST] Why there is E field at the direction of wave propagating in coaxial line., Tesla
  13. » [SI-LIST] two IEEE presentations by Bogatin in next few weeks, Eric Bogatin
  14. » [SI-LIST] Resend:Why there is E field at the direction of wave propagating in coaxial line., Tesla
  15. » [SI-LIST] Re: characteristic impedance at DC, Todd Hubing
  16. » [SI-LIST] ad code injection?, Doug Smith
  17. » [SI-LIST] 2012 EPEPS Conference - CALL FOR PAPERS, MacGregor, Kara Lynn
  18. » [SI-LIST] Single Point Grounding - Not Achievable at High Frequencies (greater than a few MHz), Doug Smith
  19. » [SI-LIST] Book on clocking, prasad
  20. » [SI-LIST] DC power Analysis/Current Density, bala
  21. » [SI-LIST] Differential BGA Breakout, Gary Stein
  22. » [SI-LIST] Toggle-Mode Flash Interface Specification, edward kowal
  23. » [SI-LIST] pkg model usage, Zhang Tony
  24. » [SI-LIST] Best routing layer for SERDES, Mervin J
  25. » [SI-LIST] Free Agilent High Speed Digital Seminars: UK (Winnersh, Manchester, Edinburgh) 19, 25, 26 April 2012, colin_warwick
  26. » [SI-LIST] European IBIS Summit at SPI 2012 - Third Call for Papers/Participation, Lance Wang
  27. » [SI-LIST] Re: Best routing layer for SERDES, Lee Ritchey
  28. » [SI-LIST] IBIS Summit at DAC 2012 - First Call for Participation and Presentations, Mirmak, Michael
  29. » [SI-LIST] where should we get the SET2DIL software, 黄涛
  30. » [SI-LIST] Negative Voltage signal Return Path, vinod ah
  31. » [SI-LIST] Infinite subckt recursion error in Sisoft, Nijagunamurthy, Hithesh (GE Intelligent Platforms)
  32. » [SI-LIST] Via Structure, Filion, Marc-Andre
  33. » [SI-LIST] Translation failed due to DMLCHECK errors, 冰峰
  34. » [SI-LIST] VNA and characterization of long cables, Mark Filipov
  35. » [SI-LIST] 16th IEEE Symposium on Consumer Electronics and 6th Symposium on Signal Integrity, ALDO W MORALES
  36. » [SI-LIST] Design rules for estimating crosstalk, Pehr Andersson
  37. » [SI-LIST] Bogatin events coming soon, Eric Bogatin
  38. » [SI-LIST] Effects of anti-pad diameter on SDD11 for differential vias, Pehr Andersson
  39. » [SI-LIST] Hspice Initial conditions for AC cap in serial link, Joel Brown
  40. » [SI-LIST] pattern generator code for PCI express simulation, Joel Brown
  41. » [SI-LIST] Why did my measurement work?, Iain Waugh
  42. » [SI-LIST] IEEE EMC Santa Clara Valley Chapter: Guest Speaker Henry Ott, Eriko Yamato
  43. » [SI-LIST] Test engineer position at APM (AMCC) CA BAY AREA, Dev Malladi
  44. » [SI-LIST] Selecting source/sink nodes for single ended vs differential in Q3D, Krishna Chaitanya
  45. » [SI-LIST] European IBIS Summit at SPI 2012 - Fourth Call for Papers/Participation, Lance Wang
  46. » [SI-LIST] Re: Why did my measurement work?, Sen Velmurugan
  47. » [SI-LIST] DDR2 termination Questions, Hithesh
  48. » [SI-LIST] Re: IBIS ., Deepak M V
  49. » [SI-LIST] Re: Rise / Fall time, Hithesh
  50. » [SI-LIST] DC-DC converter Vs Signal Integrity, bala