Posts for si-list, 02-2009

Browse: Last Month: 01-2009 Main Archive Page Next Month: 03-2009

» [SI-LIST] Re: Termination resistors - steve weir
» [SI-LIST] Termination resistors - david stern
» [SI-LIST] Re: general belief about Xtalk - Yuriy Shlepnev
» [SI-LIST] Re: Switching diff pairs from tightly coupled to loosely coupled and back - steve weir
» [SI-LIST] Re: general belief about Xtalk - Ihsan Erdin
» [SI-LIST] Switching diff pairs from tightly coupled to loosely coupled and back - Marc Battyani
» [SI-LIST] Re: general belief about Xtalk - Mick zhou
» [SI-LIST] Re: 180 degree turns in high speed lines - wolfgang . maichen
» [SI-LIST] Re: Errata for "Timing Analysis for Signal Integrity Engineers" - Mirmak, Michael
» [SI-LIST] Re: 180 degree turns in high speed lines - Lee Ritchey
» [SI-LIST] 180 degree turns in high speed lines - otter30
» [SI-LIST] Re: Regarding Output Voltage Rise time of linear Regulators. - Shimko, Steven R.
» [SI-LIST] Re: Regarding Output Voltage Rise time of linear Regulators. - DAVID CUTHBERT
» [SI-LIST] Re: Regarding Output Voltage Rise time of linear Regulators. - Istvan Novak
» [SI-LIST] Re: Regarding Output Voltage Rise time of linear Regulators. - olaney
» [SI-LIST] Regarding Output Voltage Rise time of linear Regulators. - Vivekkumar M-TLS,Chennai
» [SI-LIST] European IBIS Summit @ DATe 2009 - Second Call for Participation - Ralf Brüning
» [SI-LIST] Re: Errata for "Timing Analysis for Signal Integrity Engineers" - colin_warwick
» [SI-LIST] Errata for "Timing Analysis for Signal Integrity Engineers" - Gregory R Edlund
» [SI-LIST] Re: Preparing S-Parameters for Simulation - colin_warwick
» [SI-LIST] Re: Ask help for s-parameter simulation - Tracy Barclay
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Dmitriev-Zdorov, Vladimir
» [SI-LIST] Re: si-list Digest V9 #58 - Dmitriev-Zdorov, Vladimir
» [SI-LIST] Re: Ask help for s-parameter simulation - Aubrey_Sparkman
» [SI-LIST] Re: Ask help for s-parameter simulation - C. Kumar
» [SI-LIST] Ask help for s-parameter simulation - Lucian Zhang
» [SI-LIST] Re: Preparing S-Parameters for Simulation - colin_warwick
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Lynne D. Green
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Peter . Pupalaikis
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Dmitriev-Zdorov, Vladimir
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Timothy Coyle
» [SI-LIST] Re: trace width working as a plane - wolfgang . maichen
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Scott McMorrow
» [SI-LIST] Re: trace width working as a plane - Zabinski, Patrick
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Scott McMorrow
» [SI-LIST] trace width working as a plane - Daniel Bauer
» [SI-LIST] Re: Preparing S-Parameters for Simulation - amolak_badesha
» [SI-LIST] Re: Preparing S-Parameters for Simulation - wolfgang . maichen
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Timothy Coyle
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Timothy Coyle
» [SI-LIST] Re: Preparing S-Parameters for Simulation - Yuriy Shlepnev
» [SI-LIST] Re: Preparing S-Parameters for Simulation - wolfgang . maichen
» [SI-LIST] Preparing S-Parameters for Simulation - Timothy Coyle
» [SI-LIST] general belief about Xtalk - eric bogatin
» [SI-LIST] general belief about Xtalk - eric bogatin
» [SI-LIST] Re: general belief about Xtalk - Gregory R Edlund
» [SI-LIST] Re: How to obtain accurate S11 for 75ohm Zo DUT using Network Analyzer? - steve weir
» [SI-LIST] AW: How to obtain accurate S11 for 75ohm Zo DUT using Network Analyzer? - Havermann, Gert
» [SI-LIST] How to obtain accurate S11 for 75ohm Zo DUT using Network Analyzer? - ji-fong_lim
» [SI-LIST] 快把你的精液射到她身上吧 - f83118
» [SI-LIST] Re: general belief about Xtalk - Istvan Novak
» [SI-LIST] Re: PCB Advise - wolfgang . maichen
» [SI-LIST] Re: PCB Advise - Vipul Badoni
» [SI-LIST] Re: PDS target Impedance (adaptive method) - Arai, Tadashi
» [SI-LIST] Re: general belief about Xtalk - David Banas
» [SI-LIST] general belief about Xtalk - Mick zhou
» [SI-LIST] Re: PCB Advise - wolfgang . maichen
» [SI-LIST] Re: PCB Advise - olaney
» [SI-LIST] PCB Advise - Luciano Boglione
» [SI-LIST] webinar Feb 25 1 pm EST - eric bogatin
» [SI-LIST] Re: [SI-LIST] - DAVID CUTHBERT
» [SI-LIST] Re: Imbalance in outout from single ended drivers driving RF (13.56 MHz) antenna - olaney
» [SI-LIST] Re: impedance controlled vias - wolfgang . maichen
» [SI-LIST] Re: impedance controlled vias - qazi
» [SI-LIST] impedance controlled vias - qazi
» [SI-LIST] Draft (updated) Touchstone 2.0 specification available for review - Mirmak, Michael
» [SI-LIST] Re: Imbalance in outout from single ended drivers driving RF (13.56 MHz) antenna - Bharathkumar Raju
» [SI-LIST] Re: Imbalance in outout from single ended drivers driving RF (13.56 MHz) antenna - olaney
» [SI-LIST] Imbalance in outout from single ended drivers driving RF (13.56 MHz) antenna - Bharathkumar Raju
» [SI-LIST] Re: PDS target Impedance (adaptive method) - Alexandre . AMEDEO
» [SI-LIST] Tool for SI analysis using IBIS models - Chetana Raghuwanshi
» [SI-LIST] Re: PDS target Impedance (adaptive method) - Inmyoung Song
» [SI-LIST] Info on LR-DIMM - Chris Cheng
» [SI-LIST] antenna layout - tang_123458
» [SI-LIST] Re: Current Mode Compensation for DC/DC Buck Regulators - steve weir
» [SI-LIST] Re: Current Mode Compensation for DC/DC Buck Regulators - Istvan Novak
» [SI-LIST] Current Mode Compensation for DC/DC Buck Regulators - Avtaar Singh
» [SI-LIST] Re: (No Date: Tue, 17 Feb 2009 09:34:35 -0800 - jian
» [SI-LIST] - Tang, Linda \(Xin Cai\)
» [SI-LIST] Re: Difference Between RJ45 & RJ48 - kevin hoffmann
» [SI-LIST] Re: BGA sockets or a source of compression type material - Barnes, Heidi
» [SI-LIST] Re: BGA sockets or a source of compression type material - Nick Langston
» [SI-LIST] RJ48 - Smith, Justin D.
» [SI-LIST] Difference Between RJ45 & RJ48 - Arun kumar P N
» [SI-LIST] Re: BGA sockets or a source of compression type material - Barnes, Heidi
» [SI-LIST] Signal integrity and package design job at Global Unichip. San Jose, CA - larry . zu
» [SI-LIST] Re: power planes (4-layer-board) - steve weir
» [SI-LIST] Re: power planes (4-layer-board) - Todd Hubing
» [SI-LIST] Re: power planes (4-layer-board) - Daniel Bauer
» [SI-LIST] BGA sockets or a source of compression type material - David Greig
» [SI-LIST] Re: 答复: power planes (4-layer-board) - V S
» [SI-LIST] 答复: power planes (4-layer-board) - Zhangkun
» [SI-LIST] Re: power planes (4-layer-board) - steve weir
» [SI-LIST] Re: power planes (4-layer-board) - steve weir
» [SI-LIST] Re: power planes (4-layer-board) - Daniel Bauer
» [SI-LIST] Re: power planes (4-layer-board) - Pommerenke, David
» [SI-LIST] power planes (4-layer-board) - Daniel Bauer
» [SI-LIST] Memory Architect Position - Elias Lozano
» [SI-LIST] HFSS Project Posted on Split Planes - admin@xxxxxxxxxxxxxx
» [SI-LIST] Free seminars in 17 North American Cities, Feb 17-19. "Connect to the Agilent Experts: PCI Express, USB and DDR Simulations Made Easy!" - colin_warwick
» [SI-LIST] PDS target Impedance (adaptive method) - Lakshmi Narayanan Sowrirajan, TLS-Chennai
» [SI-LIST] Fatal error: DCtrCurv: source / resistor not in circuit - navaram kumar
» [SI-LIST] Spec Driven Elctrical Verfication - navaram kumar
» [SI-LIST] temporary positions available at Mayo Clinic - Buchs, Kevin
» [SI-LIST] AW: Verifying parts of the channel Simulation - Havermann, Gert
» [SI-LIST] Re: High Speed Board Design Guidelines Resource Center - liuluping 41830
» [SI-LIST] Will the Real High Speed Design Guru John D'Ambrosia please tell me where you landed after leaving Tyco Electronics - Salkow, Steven
» [SI-LIST] Re: Verifying parts of the channel Simulation - V S
» [SI-LIST] Re: Verifying parts of the channel Simulation - Gary Otonari
» [SI-LIST] Verifying parts of the channel Simulation - Havermann, Gert
» [SI-LIST] power distribution of Battery operated hand-held devices - Jaison Fernandez
» [SI-LIST] Re: chassis ground connections - daniel . bauer16
» [SI-LIST] Basic hspice tutorial for beginners - V S
» [SI-LIST] Re: PCIe Gen2 Add In Card passing CLB - Joel Brown
» [SI-LIST] PCIe Gen2 Add In Card passing CLB - Snowdon, Kenneth
» [SI-LIST] Re: chassis ground connections - Cosmin Iorga
» [SI-LIST] Re: chassis ground connections - olaney
» [SI-LIST] Re: PCI Express CLB compliance waveform - Joel Brown
» [SI-LIST] chassis ground connections - Daniel Bauer
» [SI-LIST] chassis ground connections - Daniel Bauer
» [SI-LIST] Re: PCI Express CLB compliance waveform - David Palmer
» [SI-LIST] High Speed Board Design Guidelines Resource Center - Salman Jiva
» [SI-LIST] 答复: Return loss test in E1 signal - Zhangkun
» [SI-LIST] AW: Return loss test in E1 signal - Havermann, Gert
» [SI-LIST] Re: Return loss test in E1 signal - Arun kumar P N
» [SI-LIST] AW: Return loss test in E1 signal - Havermann, Gert
» [SI-LIST] Return loss test in E1 signal - Arun kumar P N
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Cosmin Iorga
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Istvan Nagy
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Jory McKinley
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Cosmin Iorga
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Stephen Blake
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Joel Brown
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Cosmin Iorga
» [SI-LIST] Sr. R.F. Design Engineer resistive products - bruce harvie
» [SI-LIST] Yours truly!!! - Mr.John Izualo
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Istvan Nagy
» [SI-LIST] signal integrity position available in San Jose, CA area - Daniel Lambalot
» [SI-LIST] PCB ground plane topology and IC damage - Doug Smith
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Istvan Novak
» [SI-LIST] Re: What are power integrity tools available out there? Anything inexpensive that works? - Aleksandr Oysgelt
» [SI-LIST] IBIS Summit at DesignCon 2009 Presentations On-line! - Mirmak, Michael
» [SI-LIST] Re: E1 switching application - Peter zhu
» [SI-LIST] Re: SERDES - Kulvinder
» [SI-LIST] SERDES - navaram kumar
» [SI-LIST] E1 switching application - Arun kumar P N
» [SI-LIST] IPC Designer Council Meeting (Silicon Valley Chapter) - Bob McCreight
» [SI-LIST] European IBIS Summit @ DATe 2009 - First Call for Participation - Ralf Brüning
» [SI-LIST] European IBIS Summit @ DATe 2009 - First Call for Participation - Ralf Brüning
» [SI-LIST] Request for IBIS models - Ritesh @ Reliant EDS
» [SI-LIST] Call for IBIS 5.0 parser development bids! - Mirmak, Michael
» [SI-LIST] Re: Allowed Crosstalk on DDR2 Strobe (DQS) - Peter zhu
» [SI-LIST] Allowed Crosstalk on DDR2 Strobe (DQS) - Hirshtal Itzhak
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Bharathi
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Alfred P. Neves
» [SI-LIST] SiSoft at DesignCon 2009 - Barry Katz