Posts for si-list, 01-2009

Browse: Last Month: 12-2008 Main Archive Page Next Month: 02-2009

» [SI-LIST] 答复: Failed Tantalum capacitors - package hermeticity compromised - Zhangkun
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Robert Sefton
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Marc Battyani
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Andrew Ingraham
» [SI-LIST] Re: Dividing a low jitter clock by 2 - todd t
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Marc Battyani
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Andrew Ingraham
» [SI-LIST] New content available on beTheSignal.com - eric bogatin
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Peter zhu
» [SI-LIST] Re: PCI Express CLB compliance waveform - Peter zhu
» [SI-LIST] Re: Dividing a low jitter clock by 2 - Mikhail Matusov
» [SI-LIST] Re: Dividing a low jitter clock by 2 - wolfgang . maichen
» [SI-LIST] Dividing a low jitter clock by 2 - Marc Battyani
» [SI-LIST] PCI Express CLB compliance waveform - Joel Brown
» [SI-LIST] January Issue of XrossTalk Magazine Available - Timothy Coyle
» [SI-LIST] Teraspeed at DesignCon - Scott McMorrow
» [SI-LIST] Re: hspice erroring out - Chris Cheng
» [SI-LIST] hspice erroring out - Danish Jawed
» [SI-LIST] Re: Agenda, IBIS Summit at DesignCon for Feb. 5, 2009 - Douglas Smith
» [SI-LIST] Re: BGA vias outside the package - wolfgang . maichen
» [SI-LIST] Agenda, IBIS Summit at DesignCon for Feb. 5, 2009 - Mirmak, Michael
» [SI-LIST] Re: BGA vias outside the package - Chris Cheng
» [SI-LIST] Re: BGA vias outside the package - Scott McMorrow
» [SI-LIST] Re: BGA vias outside the package - Scott McMorrow
» [SI-LIST] Re: BGA vias outside the package - Cosmin Iorga
» [SI-LIST] Re: BGA vias outside the package - Scott McMorrow
» [SI-LIST] Re: BGA vias outside the package - Cosmin Iorga
» [SI-LIST] Re: BGA vias outside the package - V S
» [SI-LIST] Re: BGA vias outside the package - Scott McMorrow
» [SI-LIST] Re: BGA vias outside the package - Scott McMorrow
» [SI-LIST] Re: BGA vias outside the package - V S
» [SI-LIST] Re: BGA vias outside the package - Cosmin Iorga
» [SI-LIST] BGA vias outside the package - Ryan Sequeira
» [SI-LIST] Re: Multi-transmission line Zo - Yuriy Shlepnev
» [SI-LIST] Re: Multi-transmission line Zo - Istvan Novak
» [SI-LIST] Multi-transmission line Zo - Jennifer Maharani
» [SI-LIST] Re: Failed Tantalum capacitors - package hermeticity compromised - Andrew Ingraham
» [SI-LIST] Re: Fixturing and Calibration for Measurement Based Modeling Tutorial, DesignCon2009 Feb. 2nd - Barnes, Heidi
» [SI-LIST] Re: Training Classes - Designing for Signal Integrity with Advanced Design System - Santa Clara CA February 24-27 - colin_warwick
» [SI-LIST] Re: Failed Tantalum capacitors - package hermeticity compromised - peter zhu
» [SI-LIST] Re: Failed Tantalum capacitors - package hermeticity compromised - Curt McNamara
» [SI-LIST] Training Classes - Designing for Signal Integrity with Advanced Design System - Santa Clara CA February 24-27 - colin_warwick
» [SI-LIST] Re: Failed Tantalum capacitors - package hermeticity compromised - Tom Myers
» [SI-LIST] Re: Failed Tantalum capacitors - package hermeticity compromised - Nash, Timothy J
» [SI-LIST] Re: Failed Tantalum capacitors - package hermeticity compromised - k EPD
» [SI-LIST] Re: Failed Tantalum capacitors - package hermeticity compromised - Ravinder . Ajmani
» [SI-LIST] Failed Tantalum capacitors - package hermeticity compromised - Salkow, Steven
» [SI-LIST] Re: mEEt and gEEk 3.0 - Ravinder . Ajmani
» [SI-LIST] Re: The Implications of Nonmonotonic Transitions - David Lieby
» [SI-LIST] Re: mEEt and gEEk 3.0 - Julian Ferry
» [SI-LIST] Re: The Implications of Nonmonotonic Transitions - Andrew Ingraham
» [SI-LIST] link error in HFNews - Doug Smith
» [SI-LIST] HFNews letter - Doug Smith
» [SI-LIST] Re: The Implications of Nonmonotonic Transitions - Sinha, Snehamay
» [SI-LIST] AMD Contact - wjcsongr
» [SI-LIST] Re: The Implications of Nonmonotonic Transitions - Andrew Ingraham
» [SI-LIST] Re: The Implications of Nonmonotonic Transitions - Istvan Nagy
» [SI-LIST] Re: The Implications of Nonmonotonic Transitions - Lynne D. Green
» [SI-LIST] The Implications of Nonmonotonic Transitions - tucsonAz
» [SI-LIST] Re: PCIe Gen2 Insertion Loss Budget - Jory McKinley
» [SI-LIST] Re: Vote in the DesignCon Video Contest - Jack Olson
» [SI-LIST] Vote in the DesignCon Video Contest - colin_warwick
» [SI-LIST] ICMCHK1 version 1.1.3 available! - Mirmak, Michael
» [SI-LIST] Re: Power Supply impedance simulations - Cosmin Iorga
» [SI-LIST] 答复: Power Supply impedance simulations - Zhangkun
» [SI-LIST] Re: Power Supply impedance simulations - Istvan Novak
» [SI-LIST] Power Supply impedance simulations - codymiller
» [SI-LIST] IBIS Model Survey - Timothy Coyle
» [SI-LIST] PCIe Gen2 Insertion Loss Budget - Stefan Milnor
» [SI-LIST] Re: VSWR using the TDR Measurements. - Yuriy Shlepnev
» [SI-LIST] VSWR using the TDR Measurements. - padma gundala
» [SI-LIST] Re: my first SF novel now on Amazon - Michael Greim
» [SI-LIST] my first SF novel now on Amazon - eric bogatin
» [SI-LIST] Re: OTA ouput noise - chao wang
» [SI-LIST] Re: S11 and S21 for PCB trace with different dielectic think - Brad Brim
» [SI-LIST] Contract Work - Jory McKinley
» [SI-LIST] Re: IBIS Model Using Package Model Error - Mike LaBonte (milabont)
» [SI-LIST] Re: S11 and S21 for PCB trace with different dielectic think - Yuriy Shlepnev
» [SI-LIST] Re: S11 and S21 for PCB trace with different dielectic think - Peter . Pupalaikis
» [SI-LIST] Re: S11 and S21 for PCB trace with different dielectic think - Clewell, Craig
» [SI-LIST] Re: S11 and S21 for PCB trace with different dielectic think - Istvan Novak
» [SI-LIST] Re: S11 and S21 for PCB trace with different dielectic think - Ralph Wilson
» [SI-LIST] Re: Are there any protection device forum? Who know? - John Ward
» [SI-LIST] Re: Characteristic Impedance mesurement on PCB - Tom Dagostino
» [SI-LIST] Characteristic Impedance mesurement on PCB - padma gundala
» [SI-LIST] Re: S11 and S21 for PCB trace with different dielectic think - Brad Brim
» [SI-LIST] S11 and S21 for PCB trace with different dielectic think - John Kwan
» [SI-LIST] Re: IBIS Model Using Package Model Error - Mirmak, Michael
» [SI-LIST] Re: IBIS Model Using Package Model Error - Ray Anderson
» [SI-LIST] Re: IBIS Model Using Package Model Error - Tom Dagostino
» [SI-LIST] Re: IBIS Model Using Package Model Error - Chris . McGrath
» [SI-LIST] Re: IBIS Model Using Package Model Error - Chris . McGrath
» [SI-LIST] Re: IBIS Model Using Package Model Error - Muranyi, Arpad
» [SI-LIST] Re: IBIS Model Using Package Model Error - Gang Zhao
» [SI-LIST] Re: IBIS Model Using Package Model Error - Chris . McGrath
» [SI-LIST] Re: IBIS Model Using Package Model Error - Seshadri Venkataramanan
» [SI-LIST] IBIS Model Using Package Model Error - Chris . McGrath
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Sam Chitwood
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Nicholas Langston
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Scott McMorrow
» [SI-LIST] OTA ouput noise - chao wang
» [SI-LIST] Re: Ask for IBIS modeling - Tom Dagostino
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Sam Chitwood
» [SI-LIST] Ask for IBIS modeling - Lijun
» [SI-LIST] Ask for IBIS modeling - Lijun
» [SI-LIST] Discussion for IBIS modeling - Lijun
» [SI-LIST] Discussion for IBIS modeling - Lijun
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Lance Wang
» [SI-LIST] Are there any protection device forum? Who know? - simon zhou
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Chris Cheng
» [SI-LIST] Re: Where are IBIS models with SSO support ? - David Lieby
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Chris Cheng
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Mirmak, Michael
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Chris Cheng
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Walter Katz
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Chris Cheng
» [SI-LIST] Re: good 0402 or 0201 jumpers - Michael Greim
» [SI-LIST] good 0402 or 0201 jumpers - Marc Battyani
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Istvan Nagy
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Walter Katz
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Coleman, Dave
» [SI-LIST] mEEt and gEEk 3.0 - Julian Ferry
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Scott McMorrow
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Dan Smith
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Scott McMorrow
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Joshua Fender
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Powell, Jon N
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Powell, Jon N
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Aubrey_Sparkman
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Istvan Nagy
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Chris Cheng
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Scott McMorrow
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Powell, Jon N
» [SI-LIST] Re: Where are IBIS models with SSO support ? - johndp
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Muranyi, Arpad
» [SI-LIST] 答复: Where are IBIS models with SSO support ? - Zhangkun
» [SI-LIST] Re: Where are IBIS models with SSO support ? - Cortex Y.C. Chen
» [SI-LIST] Where are IBIS models with SSO support ? - Chris Cheng
» [SI-LIST] 1) Winnersh UK: Free joint seminar from Agilent, Xilinx, Elpida, MathWorks, NXP 2) Free Agilent Webcast in European time zone - colin_warwick
» [SI-LIST] Re: parasitic elements of SMD resistors - Chris Belting
» [SI-LIST] Re: parasitic elements of SMD resistors - DAVID CUTHBERT
» [SI-LIST] Re: parasitic elements of SMD resistors - Pommerenke, David
» [SI-LIST] Re: parasitic elements of SMD resistors - steve weir
» [SI-LIST] Re: parasitic elements of SMD resistors - eoin.mcgibney
» [SI-LIST] Re: parasitic elements of SMD resistors - steve weir
» [SI-LIST] parasitic elements of SMD resistors - jan . vercammen1
» [SI-LIST] Re: Manufacturing Issues - Sol Tatlow
» [SI-LIST] Re: 3D-em simulation and terminations: macromodelling - Yuriy Shlepnev
» [SI-LIST] Senior Staff Signal Integrity Opening (Juniper Networks) - Luong Hoang
» [SI-LIST] Re: 3D-em simulation and terminations: macromodelling - Istvan Nagy
» [SI-LIST] Re: Telephone Circuit EMC issues - steve weir
» [SI-LIST] Re: Telephone Circuit EMC issues - John Matthews
» [SI-LIST] Re: Manufacturing Issues - kfrobinson
» [SI-LIST] Re: 65 Ohm compact PCI impedance - wjcsongr
» [SI-LIST] Re: stripline with unconnected reference planes - Istvan Novak
» [SI-LIST] Re: 65 Ohm compact PCI impedance - Peterson, James F (EHCOE)
» [SI-LIST] Re: Telephone Circuit EMC issues - John Ward
» [SI-LIST] AW: Manufacturing Issues - Havermann, Gert
» [SI-LIST] Re: Manufacturing Issues - Marc Battyani
» [SI-LIST] Re: 65 Ohm compact PCI impedance - Lee Ritchey
» [SI-LIST] Re: 65 Ohm compact PCI impedance - Lee Ritchey
» [SI-LIST] Re: stripline with unconnected reference planes - Yuriy Shlepnev
» [SI-LIST] Re: Telephone Circuit EMC issues - Moustapha Abdi Hassan
» [SI-LIST] Re: Telephone Circuit EMC issues - Richard Jungert
» [SI-LIST] stripline with unconnected reference planes - Sexton, Brian M. \(US SSA\)
» [SI-LIST] Re: Telephone Circuit EMC issues - Bill Wurst
» [SI-LIST] Re: Manufacturing Issues - Bill Wurst
» [SI-LIST] Re: 65 Ohm compact PCI impedance - Peterson, James F (EHCOE)
» [SI-LIST] Re: 65 Ohm compact PCI impedance - wjcsongr
» [SI-LIST] Re: 65 Ohm compact PCI impedance - wjcsongr
» [SI-LIST] Re: 65 Ohm compact PCI impedance - Powell, Jon N
» [SI-LIST] 65 Ohm compact PCI impedance - Sexton, Brian M. \(US SSA\)
» [SI-LIST] Re: Manufacturing Issues - Bill Stube
» [SI-LIST] Re: Manufacturing Issues - Mark Craven
» [SI-LIST] Re: Manufacturing Issues - Harry Lin
» [SI-LIST] Manufacturing Issues - Thompson, Gary D (Gary)
» [SI-LIST] Re: ground planes at top / bottom layer - Powell, Jon N
» [SI-LIST] Re: ground planes at top / bottom layer - Todd Hubing
» [SI-LIST] Re: ground planes at top / bottom layer - wjcsongr
» [SI-LIST] Re: ground planes at top / bottom layer - Mike Finczak
» [SI-LIST] 3D-em simulation and terminations: macromodelling - Gregory R Edlund
» [SI-LIST] Re: ground planes at top / bottom layer - DAVID CUTHBERT
» [SI-LIST] Re: ground planes at top / bottom layer - DAVID CUTHBERT
» [SI-LIST] Re: mode conversion myth - liuluping 41830
» [SI-LIST] Re: 3D-em simulation and terminations: macromodelling - Albert Ruehli
» [SI-LIST] Re: ground planes at top / bottom layer - Grasso, Charles
» [SI-LIST] Re: 3D-em simulation and terminations: macromodelling - Yuriy Shlepnev
» [SI-LIST] Re: 3D-em simulation and terminations: macromodelling - Dmitriev-Zdorov, Vladimir
» [SI-LIST] AW: 3D-em simulation and terminations: macromodelling - Havermann, Gert
» [SI-LIST] Re: mode conversion myth - Istvan Novak
» [SI-LIST] Re: 3D-em simulation and terminations: macromodelling - jian
» [SI-LIST] 3D-em simulation and terminations: macromodelling - Istvan Nagy
» [SI-LIST] Re: ??:RE: Re: mode conversion myth - Yuriy Shlepnev
» [SI-LIST] Telephone Circuit EMC issues - Saril
» [SI-LIST] Re: Some food for thought - Schumacher, Richard (HSTD Signal Integrity)
» [SI-LIST] Re: Solder mask - msharpes
» [SI-LIST] Re: mode conversion myth - Ken Cantrell
» [SI-LIST] Serpentine routing in one line of a Diff Pair - sreekanthn
» [SI-LIST] Re: Solder mask - liuluping 41830
» [SI-LIST] 一絲不掛的虹蘭展現出無與倫比的出塵的美 - f83118
» [SI-LIST] 回复:RE: Re: mode conversion myth - liuluping 41830
» [SI-LIST] 回复:Re: Bulk capacitor decoupling - liuluping 41830
» [SI-LIST] Re: mode conversion myth - Yuriy Shlepnev
» [SI-LIST] Re: ground planes at top / bottom layer - Chris Cheng
» [SI-LIST] Re: ground planes at top / bottom layer - Martin Euredjian
» [SI-LIST] Re: mode conversion myth - Istvan Novak
» [SI-LIST] Re: ground planes at top / bottom layer - Kenneth W. Egan
» [SI-LIST] Re: Bulk capacitor decoupling - Istvan Novak
» [SI-LIST] Re: ground planes at top / bottom layer - olaney@xxxxxxxx
» [SI-LIST] Re: ground planes at top / bottom layer - Lee Ritchey
» [SI-LIST] Re: ground planes at top / bottom layer - Richard Jungert
» [SI-LIST] Re: ground planes at top / bottom layer - earl albin
» [SI-LIST] Re: ground planes at top / bottom layer - Richard Jungert
» [SI-LIST] Re: mode conversion myth - steve weir
» [SI-LIST] Re: Bulk capacitor decoupling - steve weir
» [SI-LIST] Re: mode conversion myth - liuluping 41830
» [SI-LIST] Re: Bulk capacitor decoupling - liuluping 41830
» [SI-LIST] Re: ground planes at top / bottom layer - olaney
» [SI-LIST] Re: ground planes at top / bottom layer - Lee Ritchey
» [SI-LIST] Doing your own EMI Analysis - V S