Posts for si-list, 01-2008

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» [SI-LIST] Agenda, IBIS Summit at DesignCon 2008 on Feb. 7 -
» [SI-LIST] SPI'08 : last week to submit your paper -
» [SI-LIST] Book on Vector Network Analyzers -
» [SI-LIST] EMC simulation -
» [SI-LIST] CLASS IS FULL: Power Integrity Modeling and Design Seminar on 2/08/08, 1-4pm @ Sun, Menlo Park Bldg 12 -
» [SI-LIST] Re: High speed USB cable -
» [SI-LIST] Power Integrity Modeling and Design Seminar on 2/08/08, 1-4pm @ Sun, Menlo Park Bldg 12 -
» [SI-LIST] Update: Free Spice post-processing environment -
» [SI-LIST] Update: Free Spice post-processing environment -
» [SI-LIST] E-ATX Form Factor -
» [SI-LIST] internal timestep too small in transient analysis -
» [SI-LIST] Re: internal timestep too small in transient analysis HSPICE -
» [SI-LIST] Re: MPC8630E Freescale Oscillator -
» [SI-LIST] Please ignore -
» [SI-LIST] internal timestep too small in transient analysis HSPICE -
» [SI-LIST] European IBIS Summit at DATe 2008 - First Call for Call for Paticipation -
» [SI-LIST] 帳號被盜用!! -
» [SI-LIST] Symposium on Signal Integrity -
» [SI-LIST] MPC8630E Freescale Oscillator -
» [SI-LIST] Meet your fellow SI-listers face to face at DesignCon! -
» [SI-LIST] Re: 0.9 mil,0.8 mil,0.7mil gold wire application for IC packaging -
» [SI-LIST] Re: What is meant by a differential signal -
» [SI-LIST] Re: What is meant by a differential signal -
» [SI-LIST] Re: 0.9 mil,0.8 mil,0.7mil gold wire application for IC packaging -
» [SI-LIST] Re: si-list Digest V8 #22 -
» [SI-LIST] Re: The current distribution and partial self-inductance -
» [SI-LIST] What is meant by a differential signal -
» [SI-LIST] Re: The current distribution and partial self-inductance -
» [SI-LIST] The current distribution and partial self-inductance -
» [SI-LIST] Cisco Systems - Sr. Signal Integrity Engineer position -
» [SI-LIST] 0.9 mil,0.8 mil,0.7mil gold wire application for IC packaging -
» [SI-LIST] SECOND CALL FOR PAPERS: SPI'08 -
» [SI-LIST] SECOND CALL FOR PAPERS: SPI'08 -
» [SI-LIST] Capacitor in parallel -
» [SI-LIST] Re: How to place the AC coupling capacitor of the serdes? -
» [SI-LIST] Re: How to place the AC coupling capacitor of the serdes? -
» [SI-LIST] Re: How to place the AC coupling capacitor of the serdes? -
» [SI-LIST] AC coupling capacitor testpoint -
» [SI-LIST] Re: How to place the AC coupling capacitor of the serdes? -
» [SI-LIST] Re: How to place the AC coupling capacitor of the serdes? -
» [SI-LIST] Re: Hi -
» [SI-LIST] Re: High speed USB cable -
» [SI-LIST] Re: AC Termination : Capacitor Value -
» [SI-LIST] Re: How to place the AC coupling capacitor of the serdes? -
» [SI-LIST] How to place the AC coupling capacitor of the serdes? -
» [SI-LIST] Re: High speed USB cable -
» [SI-LIST] High speed USB cable -
» [SI-LIST] Call for Papers for Mentor Graphics U2U open -
» [SI-LIST] US & Europe - Applications Engineering Job Opportunity -
» [SI-LIST] Re: Hi -
» [SI-LIST] Hi -
» [SI-LIST] 回复:Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard -
» [SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard -
» [SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard -
» [SI-LIST] Re: bare die IBIS models -
» [SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard -
» [SI-LIST] Re: Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard -
» [SI-LIST] bare die IBIS models -
» [SI-LIST] Re: PCB current carrying capacity calculation -
» [SI-LIST] Re: PCB current carrying capacity calculation -
» [SI-LIST] PCB current carrying capacity calculation -
» [SI-LIST] Questions about Compliance interconnect magnitude response and ISI loss in XAUI standard -
» [SI-LIST] Re: AC Termination : Capacitor Value -
» [SI-LIST] AC Termination : Capacitor Value -
» [SI-LIST] High Speed data/clk -
» [SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. -
» [SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. -
» [SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. -
» [SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. -
» [SI-LIST] Re: Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. -
» [SI-LIST] Reasons for the steep falloff in the observed S21 Profile for Microstrip Traces. -
» [SI-LIST] Senior SI System Engineer position at Samtec -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] San Jose EMI Workshop 1/17 -
» [SI-LIST] Re: current flow on a pwr plane -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: Using Current Probes to Measure Cable Resonance -
» [SI-LIST] Re: [!! SPAM] Re: Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: Using Current Probes to Measure Cable Resonance -
» [SI-LIST] Re: Using Current Probes to Measure Cable Resonance -
» [SI-LIST] Re: Using Current Probes to Measure Cable Resonance -
» [SI-LIST] Re: [!! SPAM] RES: Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: pci bus--> 5V = ancient history -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] pci bus -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: current flow on a pwr plane -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] current flow on a pwr plane -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] Re: 50 Ohm Via? -
» [SI-LIST] 50 Ohm Via? -
» [SI-LIST] 12th IEEE SPI WORKSHOP -
» [SI-LIST] Re: Power Distribution Strategies -
» [SI-LIST] Power Distribution Strategies -
» [SI-LIST] Re: PCB differential auto-routers -
» [SI-LIST] Re: PCB differential auto-routers -
» [SI-LIST] Re: PCB differential auto-routers -
» [SI-LIST] PCB differential auto-routers -
» [SI-LIST] Re: Placement of power/ground balls in BGAs -
» [SI-LIST] Re: Placement of power/ground balls in BGAs -
» [SI-LIST] Re: 2.4 GHz antenna - metal case related (non?) issues -
» [SI-LIST] Re: Placement of power/ground balls in BGAs -
» [SI-LIST] Placement of power/ground balls in BGAs -
» [SI-LIST] Re: SSN Simulation -
» [SI-LIST] Re: SSN Simulation -
» [SI-LIST] SSN Simulation -
» [SI-LIST] Re: Draft Touchstone 2.0 document available -
» [SI-LIST] Re: 2.4 GHz antenna - metal case related (non?) issues -
» [SI-LIST] Re: 2.4 GHz antenna - metal case related (non?) issues -
» [SI-LIST] 2.4 GHz antenna - metal case related (non?) issues -
» [SI-LIST] Re: Definition of "crosstalk loss" ?? -
» [SI-LIST] Re: [Bulk] A question about clock EMC -
» [SI-LIST] Re: A question about clock EMC -
» [SI-LIST] Re: A question about clock EMC -
» [SI-LIST] Re: A question about clock EMC -
» [SI-LIST] Using Current Probes to Measure Cable Resonance -
» [SI-LIST] A question about clock EMC -