Posts for icu-pcb-forum, 09-2004

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  1. » [PCB_FORUM] test, westfeldt
  2. » [PCB_FORUM] Sample of using embedded resistors in Allegro, Patrick Jabbaz
  3. » [PCB_FORUM] Layout queries., Budathoki, Trilok (GE Consumer & Industrial)
  4. » [PCB_FORUM] Re: RF Layout queries., Gene Carman
  5. » [PCB_FORUM] UniCAD Manual/ Documents., k.satish
  6. » [PCB_FORUM] Design re-use modules, Mike Barham
  7. » [PCB_FORUM] Re: Design re-use modules, Musetti, Carl
  8. » [PCB_FORUM] traces moving with symbols??? Anybody else see this?, icu-pcb-forum
  9. » [PCB_FORUM] Re: traces moving with symbols??? Anybody else see th is?, Jean Bratton
  10. » [PCB_FORUM] Re: traces moving with symbols??? Anybody else se e th is?, george . h . patrick
  11. » [PCB_FORUM] Re: traces moving with symbols??? Anybody else see this? Thanks, Gene Carman
  12. » [PCB_FORUM] Re: traces moving with symbols??? Anybody else se e this? Thanks, Jean Bratton
  13. » [PCB_FORUM] Infinite cursor style, Jean Bratton
  14. » [PCB_FORUM] Re: Infinite cursor style, donald . w . gillispie
  15. » [PCB_FORUM] Bga pins sharing vias, Jean Bratton
  16. » [PCB_FORUM] Re: traces moving with symbols??? Anybody else see this?, richard moffat
  17. » [PCB_FORUM] Displaying non plated holes, steve kingdon
  18. » [PCB_FORUM] Re: UniCAD Manual/ Documents., k.satish
  19. » [PCB_FORUM] Re: Bga pins sharing vias, Budathoki, Trilok (GE Consumer & Industrial)
  20. » [PCB_FORUM] SKILL, Constraint Mgr, and SigXp, vince fornier
  21. » [PCB_FORUM] Allegro to Capture BackAnnotation...., sureshbabu
  22. » [PCB_FORUM] Re: Allegro to Capture BackAnnotation...., Musetti, Carl
  23. » [PCB_FORUM] speaking of Manuals/ Documents., Gene Carman
  24. » [PCB_FORUM] RESOURCES TO CONVERT DXF TO ALLEGRO FORMAT, RANGANATHAN MURALIDHARAN
  25. » [PCB_FORUM] Re: ORCAD 6.x, Maks Sklyar
  26. » [PCB_FORUM] Re: Smooth vs Gloss, Musetti, Carl
  27. » [PCB_FORUM] Re: Displaying non plated holes, Ritter, Alan
  28. » [PCB_FORUM] linewidth change, westfeldt
  29. » [PCB_FORUM] Allegro Question, Kipnis, Oleg
  30. » [PCB_FORUM] Embedded Constraints within a Schematic for use within V15.1, Abel, Shannon K.
  31. » [PCB_FORUM] Re: Embedded Constraints within a Schematic for use within V15.1, Michael . Catrambone
  32. » [PCB_FORUM] SKILL Util for Show Net Name over Pins, Venkata Ramanan
  33. » [PCB_FORUM] DB Doctor log, Martin G. Nolting
  34. » [PCB_FORUM] fiducials, sjcharles
  35. » [PCB_FORUM] Re: fiducials, anthony . cosentino
  36. » [PCB_FORUM] Thermal analysis, Budathoki, Trilok (GE Consumer & Industrial)
  37. » [PCB_FORUM] Re: test, GK, Sandesh
  38. » [PCB_FORUM] Re: Thermal analysis, gnieski, mike
  39. » [PCB_FORUM] making rules apply to nets, not xnets, Jean Bratton
  40. » [PCB_FORUM] Re: Mentor Expedition to Allegro camparison, Prabhakar, Srinivasa
  41. » [PCB_FORUM] double stacked components, JACK KELLY
  42. » [PCB_FORUM] Re: double stacked components, Eric Hufstedler
  43. » [PCB_FORUM] can i specify a radius, sjcharles
  44. » [PCB_FORUM] Documentation of material for manufacturing, Milostnik Matija IESMSD
  45. » [PCB_FORUM] Re: Documentation of material for manufacturing, sue . reade
  46. » [PCB_FORUM] Routing layers, steve kingdon
  47. » [PCB_FORUM] Re: Routing layers, steve kingdon
  48. » [PCB_FORUM] Re: can i specify a radius, sjcharles
  49. » [PCB_FORUM] No more 15.1 licenses?, Gene Carman
  50. » [PCB_FORUM] Looking for Allegro (with constraints) tie in to Zuken. Can it be done with Specctra file?, icu-pcb-forum
  51. » [PCB_FORUM] Re: Looking for Allegro (with constraints) tie in to Zuken. Can it be done with Specctra file?, Greg Casagrande
  52. » [PCB_FORUM] Pin functions in netlist, Irina Froehling
  53. » [PCB_FORUM] Re: Looking for Allegro (with constraints) tie in to Zuken. Can it be done with Specctra file?, Degennaro, Natalie N
  54. » [PCB_FORUM] Re: Pin functions in netlist, Irina Froehling
  55. » [PCB_FORUM] cadence support forums, westfeldt
  56. » [PCB_FORUM] Re: cadence support forums, icu-pcb-forum
  57. » [PCB_FORUM] 0201 Resistors, Unruh Barry
  58. » [PCB_FORUM] Re: 0201 Resistors, anthony . cosentino
  59. » [PCB_FORUM] Re: cadence support forums LOL, Gene Carman
  60. » [PCB_FORUM] OT: TESTING AGAIN - please ignore and DO NOT REPLY TO THIS POST, Drew
  61. » [PCB_FORUM] Protel to OrCAD, Filip, Cristian
  62. » [PCB_FORUM] Urgent help needed with Allegro 15.1 s039 bord file problem, Can't update symbol due to unknown problem, what to do now?, Peter Sørensen
  63. » [PCB_FORUM] Re: Urgent help needed with Allegro 15.1 s039 bord file problem, Can't update symbol due to unknown problem, what to do now?, icu-pcb-forum
  64. » [PCB_FORUM] Re: Urgent help needed with Allegro 15.1 s039 bord fi le problem, Can't update symbol due to unknown problem, what to do now?, Jean Bratton
  65. » [PCB_FORUM] Re: Urgent help needed with Allegro 15.1 s039 bord file problem, Can't update symbol due to unknown problem, what to do now, problem found!, icu-pcb-forum
  66. » [PCB_FORUM] autosave, jack . kelly
  67. » [PCB_FORUM] Re: autosave, Malcolm Brown
  68. » [PCB_FORUM] negative text in positive plane, westfeldt
  69. » [PCB_FORUM] could not fit symbol, sjcharles
  70. » [PCB_FORUM] Re: negative text in positive plane, george . h . patrick
  71. » [PCB_FORUM] Re: could not fit symbol, Gene Carman
  72. » [PCB_FORUM] Allegro error, Budathoki, Trilok (GE Consumer & Industrial)
  73. » [PCB_FORUM] Re: Allegro error, anthony . cosentino
  74. » [PCB_FORUM] Concept fails to rename intermediate file, Mark Salberg
  75. » [PCB_FORUM] Re: Protel to OrCAD, Filip, Cristian
  76. » [PCB_FORUM] Copper balancing "thieving dots", Mark Salberg
  77. » [PCB_FORUM] Re: Copper balancing "thieving dots", Uri Chaplianka
  78. » [PCB_FORUM] I love undocumented features... sigh, Gene Carman
  79. » [PCB_FORUM] Newbie questions, ken Lee
  80. » [PCB_FORUM] Re: Newbie questions, Michael . Catrambone
  81. » [PCB_FORUM] Coloring ratsnet, sorting netlist, THOMAS FLODIN
  82. » [PCB_FORUM] Compare Design, Van Huynh (huynh)
  83. » [PCB_FORUM] What is the real character limit of a text string?, joe . piper
  84. » [PCB_FORUM] Re: Compare Design, Schwartz, Jerome
  85. » [PCB_FORUM] Re: Coloring ratsnet, sorting netlist, Gene Carman
  86. » [PCB_FORUM] Re: Allegro - Skill: Finding single node nets, Uri Chaplianka
  87. » [PCB_FORUM] drill hole..., fred de melo
  88. » [PCB_FORUM] Re: drill hole..., Scott, Ron
  89. » [PCB_FORUM] Unsubscribing from forum - How to?, hansdev@xxxxxxxxxxxxxx
  90. » [PCB_FORUM] Re: Unsubscribing from forum - How to?, george . h . patrick
  91. » [PCB_FORUM] Dual monitors, Andy_Kulik
  92. » [PCB_FORUM] Re: Dual monitors, Jean Bratton
  93. » [PCB_FORUM] Re: Buried discretes. How are FPs done?, george . h . patrick
  94. » [PCB_FORUM] Concept HDL - 15.1: Global turn off of discrete pin numbers?, J Wages
  95. » [PCB_FORUM] Re: Concept HDL - 15.1: Global turn off of discrete pin numbers?, Noble, Jan
  96. » [PCB_FORUM] Mirror dxf file?, Mark Salberg
  97. » [PCB_FORUM] Re: Mirror dxf file?, Andrew Noonan
  98. » [PCB_FORUM] Re: Mirror dxf file? LOL ProE lessons, Gene Carman
  99. » [PCB_FORUM] Intelligent Dual Footprints 15.x, Design1955@xxxxxxxxxxx
  100. » [PCB_FORUM] Flash symbols, gnieski, mike
  101. » [PCB_FORUM] Re: Flash symbols, gnieski, mike
  102. » [PCB_FORUM] Re: Intelligent Dual Footprints 15.x, Feehan, Stephen
  103. » [PCB_FORUM] orcad capture gouping signals into a bus?, Hennink, Beb
  104. » [PCB_FORUM] Re: [PCB_FORUM]skill programming, Jan Blückert (KI/EAB)
  105. » [PCB_FORUM] moving text to another layer, sjcharles
  106. » [PCB_FORUM] Re: moving text to another layer, Kraus, John R